Analog IP for TSMC
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97
Analog IP
for TSMC
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- 3nm
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Crystal Oscillators
- The crystal oscillator macros are available in a wide range of industry-standard quartz crystals and MEMS resonators operating in the fundamental mode in the 32 kHz to 80 MHz range.
- These oscillators, which are both power and area efficient, have a programmable transconductance to allow users to find the optimal balance between jitter and power consumption.
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LDO Voltage Regulator, Adjustable 0.45 V to 0.9 V Output, 30 mA, TSMC N3P
- The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process technology.
- Its low sleep current, 30 mA maximum current, output voltage adjustability and precision make it especially suitable for use as an integrated voltage regulation source for subsystems implemented in analog, digital, mixed-signal and RF ASICs and SoCs.
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LDO Voltage Regulator, 250 mA, TSMC N3P
- TSMC 3nm FinFET process
- Input voltage: 1.2 V
- Output voltage range: 0.45 V to 0.9 V
- Vout adjustable in 50 mV increments
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Core Powered Wide Range Programmable Integer PLL on TSMC CLN3P-CLN3X
- Entirely core voltage powered, needs no analog supply voltage
- Electrically Programmable PLL for multiple applications
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
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Core Powered Wide Range Programmable Integer PLL on TSMC CLN3E
- Entirely core voltage powered, needs no analog supply voltage
- Electrically Programmable PLL for multiple applications
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
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18-40MHz Crystal Oscillator on TSMC CLN3P-CLN3X
- Crystal Oscillator pad macro that supports industry standard crystals
- Uses standard CMOS transistors
- Crystal Oscillation Mode: Fundamental
- Power down option for IDDQ testing
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Temperature Sensor (Digital Output)
- Measurement Range: -20°C to +100°C
- Uncalibrated Accuracy: ±6°C
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Sleep Management Subsystem
- Power-On-Reset
- Programmable relaxation oscillator
- Low Power Comparator
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Power Management Subsystem
- The agilePMU Subsystem is an efficient and highly integrated Power Management Unit for SoCs/ASICs.
- Featuring a Power-On-Reset (POR), multiple Low Drop-Out (LDO) regulators, and an associated reference generator.
- The agilePMU Subsystem is designed to ensure low power consumption while providing optimal power management capabilities.
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Sensor Interface Subsystem
- The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs.
- Featuring multiple Analog-to-Digital Converters (agileADC), Digital-to-Analog Converters (agileDAC), low-power programmable analog comparators (agileCMP_LP), and an associated reference generator (agileREF).
- The agileSensorIF Subsystem enables easy interaction with the analog world.