Where automotive FPGAs stand in smart car designs
By Bob O’Donnell, Lattice Semiconductor
The automotive industry has gotten its fair share of time in the spotlight in recent years. Part of the focus has revolved around how important semiconductors are to modern vehicle designs equipped with smart technology capabilities. These technologies aren’t just limited to the fully electric or hybrid models, which have existed for years now, but have expanded to include SUVs and minivans outfitted with a tablet on the dashboard and a camera built into the rearview mirror. With Deloitte projecting that 45% of the cost of a new car will come from electronic systems by 2030, the importance of chips is only growing.
This is especially true with FPGAs. The most technologically advanced cars can have up to 10-12 FPGAs inside them, all performing varying functions given their inherent flexibility and small size. From infotainment systems, advanced driver assistance systems (ADAS), in-cabin artificial intelligence for human presence detection, and secure battery management, FPGAs are spread up and down vehicle designs and are making cars smarter than ever before.
To read the full article, click here
Related Semiconductor IP
- Post-Quantum Digital Signature IP Core
- Compact Embedded RISC-V Processor
- Power-OK Monitor
- RISC-V-Based, Open Source AI Accelerator for the Edge
- Securyzr™ neo Core Platform
Related White Papers
- How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
- Tips and Tricks: Using FPGAs in reliable automotive system design
- Implementing digital processing for automotive radar using SoC FPGAs
- Where Innovation Is Happening in Geolocation. Part 1: Signal Processing
Latest White Papers
- DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
- ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors
- Practical Considerations of LDPC Decoder Design in Communications Systems
- A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems
- A logically correct SoC design isn’t an optimized design