The Role of Interconnection in the Evolution of Advanced Packaging Technology
By Ki-ill Moon, Head of PKG Technology Development, SK hynix (August 18, 2023)
Intel co-founder Gordon Moore famously predicted that the number of transistors on a chip would double every one to two years. Known as Moore’s Law, this forecast held true until recently thanks to developments in pattern-miniaturization technology. However, Moore’s Law may no longer be valid as technological advancements have reached their limits and costs have risen from the use of expensive equipment such as extreme ultraviolet (EUV) lithography systems. Meanwhile, there is still great market demand for ever-improving semiconductor technologies. To bridge this gap in technological advancement and meet the semiconductor market’s needs, one solution has emerged: advanced semiconductor packaging technology.
Although advanced packaging is highly complex and involves a wide mixture of technologies, interconnection technology remains at its core. This article will cover how packaging technology has evolved and SK hynix’s recent efforts and accomplishments in helping to advance the field.
To read the full article, click here
Related Semiconductor IP
- RVA23, Multi-cluster, Hypervisor and Android
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- NPU IP Core for Mobile
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- H.264 Decoder
Related White Papers
- The rise of FPGA technology in High-Performance Computing
- The role of cache in AI processor design
- Paving the way for the next generation of audio codec for True Wireless Stereo (TWS) applications - PART 5 : Cutting time to market in a safe and timely manner
- The Future of Embedded FPGAs - eFPGA: The Proof is in the Tape Out
Latest White Papers
- QiMeng: Fully Automated Hardware and Software Design for Processor Chip
- RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator
- Concealable physical unclonable functions using vertical NAND flash memory
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design