PRODUCT HOW-TO: Bringing programmability to portable design
How Actel's flash based FPGAs can be used to replace ASICs and SRAM-based FPGAs in many portable devices
By Wendy Lockhart
Embedded.com(02/23/09, 05:40:00 PM EST)
The last decade has seen rapid and permanent change in technology markets toward smaller, more portable systems; many large systems that once sat on a desktop are now portable, while portable devices that used to fit in a backpack or briefcase must now fit in a shirt pocket. This has brought many additional design demands, most obviously battery life. Time between recharging, once measured in hours, must now stretch for days.
Size and power considerations are now often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. Design teams are continually challenged with packing more and more functionality into smaller and smaller packages, and then somehow squeezing enough power into the same package to keep everything running for days, weeks, or even months at a time on a single battery charge.
Meeting size and power requirements in portable devices typically requires application specific integrated circuits (ASICs). Increased market pressures comprising shortened development cycles and lower cost, however, make the time and expense required for ASIC development a high design risk. Taking time to design and debug an ASIC could lead to missing ever shrinking market windows, or drive development costs so high it's impossible to make a profit.
Figure 1. Sample FPGA power mode profile based on time spent in mode
By Wendy Lockhart
Embedded.com(02/23/09, 05:40:00 PM EST)
The last decade has seen rapid and permanent change in technology markets toward smaller, more portable systems; many large systems that once sat on a desktop are now portable, while portable devices that used to fit in a backpack or briefcase must now fit in a shirt pocket. This has brought many additional design demands, most obviously battery life. Time between recharging, once measured in hours, must now stretch for days.
Size and power considerations are now often the top priority in many system designs, but portability and long-lasting power can become conflicting design requirements. Design teams are continually challenged with packing more and more functionality into smaller and smaller packages, and then somehow squeezing enough power into the same package to keep everything running for days, weeks, or even months at a time on a single battery charge.
Meeting size and power requirements in portable devices typically requires application specific integrated circuits (ASICs). Increased market pressures comprising shortened development cycles and lower cost, however, make the time and expense required for ASIC development a high design risk. Taking time to design and debug an ASIC could lead to missing ever shrinking market windows, or drive development costs so high it's impossible to make a profit.
Figure 1. Sample FPGA power mode profile based on time spent in mode
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