Hardware/software design requirements analysis: Part 1 - Laying the ground work
Jeffrey O. Grady, President, JOG Systems Engineering, Inc.
EETimes (11/6/2011 8:49 PM EST)
This series of articles is about the process of developing good specifications for any hardware or software development project. In the English-speaking world, requirements are phrased in English sentences that cannot be distinguished structurally from English sentences constructed for any other purpose.
Yes, specifications are full of sentences. It is relatively easy to write sentences once you know what to write them about. A requirement is simply a statement in the chosen language that clearly defines an expectation placed on the design process prior to implementing the creative design process.
Requirements are intended to constrain the solution space to solutions that will encourage small-problem solutions that synergistically work together to satisfy the large-problem (system) solution.
Requirements are formed from the words and symbols of the chosen language. They include all of the standard language components arranged in the way that a good course in that language, commonly studied in the lower grades in school, specifies.
To read the full article, click here
Related Semiconductor IP
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
Related Articles
- Hardware/software design requirements planning - Part 2: Decomposition using structured analysis
- Hardware/software design requirements planning: Part 3 - Performance requirements analysis
- Consumer IC Advances -> Meeting MPEG-4 advanced audio coding requirements
- SoC Test and Verification -> Coverage analysis essential in ATE
Latest Articles
- VolTune: A Fine-Grained Runtime Voltage Control Architecture for FPGA Systems
- A Lightweight High-Throughput Collective-Capable NoC for Large-Scale ML Accelerators
- Quantifying Uncertainty in FMEDA Safety Metrics: An Error Propagation Approach for Enhanced ASIC Verification
- SoK: From Silicon to Netlist and Beyond Two Decades of Hardware Reverse Engineering Research
- An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks