Designing an FPGA-based graphics controller
Dominik Domanski, MYLIUM
EETimes (1/15/2011 1:35 PM EST)
“A picture is worth a thousand words.” We have all heard this saying many times and we observe the usage of icons, graphic images, pictograms, and pictures everywhere. Electronics is no exception. I remember my first projects where I used a light-emitting diode (LED) to indicate a Logic 1 value on an output pin.
After that came 7-segment displays; still later were liquid crystal displays (LCDs) with 2x16 characters (that was a big step at the time...). Some of us even played with simple black-and-white graphic LCDs. When working with these small, low-resolution devices, the task of switching individual pixels On and Off were relatively easy to perform using “cheap-and-cheerful” low-cost microcontrollers. Many designs were created in this way… in fact many are still working around us to this day.
However, problems start when we wish to work with something bigger and in color like an LCD monitor. These are relatively cheap and, in many cases, they are already on our desks. Let’s assume that we’re working with a resolution of 800 x 600 = 480,000 pixels, a color depth of 16 bits = 65,535 colors per pixel, and a refresh rate of 50 or 60 Hz. Thus, we will require 960 KB of memory for a single frame to be read 60 times per second.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
- Neural Video Processor IP
Related White Papers
- Designing a high-definition FPGA-based graphics controller
- Add graphics without using a dedicated graphics controller
- OCP-IP Compliance for Databahn Memory Controller Cores
- Mentor Graphics Executive Viewpoint : Increasing System Complexity Drives Need for IP
Latest White Papers
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions