Embedded multicore needs communications standards
By Markus Levy and Sven Brehmer, Courtesy of Embedded Systems Design
Nov 1 2006 (5:53 AM)
What do firefighting and multicore programming have in common? Both are hot jobs. Firefighters and multicores both need to get the job done as quickly and effectively as possible. They both require reliable, standardized tools. Firefighters always act as a team, and the same goes for multicore. But most importantly, they both have to communicate well. Without communication, firefighters don't survive and the cores in a multicore system may as well be operating alone.
Analogies aside, it's important to point out that "excellent communication" is a relative term that depends on the application's requirements. Regardless of the implementation, however, multicore systems can be classified according to their memory architectures and their communication mechanisms. Before we go on, we should point out that when we say multicore, we're talking about systems with two or more processing elements, including homogeneous (same processor type) and heterogeneous (different processor types) multiprocessor systems, as well as coprocessors and hardware accelerators. We should also point out that this article focuses on multicore-enabled closely distributed embedded applications, but we'll take a look at the similarities and differences of the memory architectures and communication application programming interfaces (APIs) used in desktops, servers, and networks.
Related Semiconductor IP
- Bluetooth Low Energy 6.0 Digital IP
- Ultra-low power high dynamic range image sensor
- Flash Memory LDPC Decoder IP Core
- SLM Signal Integrity Monitor
- Digital PUF IP
Related White Papers
- MPEG Standards -> Streaming audio needs interoperability
- Speed up communications standards development
- Using softcore-based FPGAs to balance hardware/software needs in a multicore design
- Multi-core: The Move from Proprietary Solutions to Open Standards
Latest White Papers
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions
- How Mature-Technology ASICs Can Give You the Edge
- Exploring the Latest Innovations in MIPI D-PHY and MIPI C-PHY