ARM vs incumbent microprocessor architectures
Robert Cravotta, Embedded Insights Inc
EDN (November 13, 2012)
Parts one, two, and three of this series offer a brief overview of the processor architecture ecosystem, identify and map the processing sweet-spot spectrum of mainstream processing architectures, and cover the issues addressed by low-power, small-data-width processors. This part discusses how incumbent microprocessor architectures can compete with ARM-based processors.
The explosion of ARM-based processors contained in mobile devices has caused some people to ask whether ARM will displace other microprocessor architectures in other markets. The incumbent microprocessor architectures, however, have a secret weapon that is analogous to the 8-bit microcontrollers: domain knowledge that is embedded in the architecture and ecosystem of the incumbent architecture.
Consider that specific variants of a microprocessor architecture will include featuresâdeveloped, tested, and refined over the yearsâthat make those variants especially well suited to the target applicationâs specific requirements. Also consider the body of software that serves the given market. A strong incumbent microprocessor architecture, much like the 8-bit microcontrollers, is surrounded by a strong and mature ecosystem of developers, tools, operating systems, and middleware that provides a buffer for the incumbent to respond to a challenger.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
- Neural Video Processor IP
Related White Papers
- Architecture and Implementation of the ARM Cortex-A8 Microprocessor
- Mobile video: ARM vs. DSP vs. hardware
- ARM64 vs ARM32 -- What's different for Linux programmers
- Amba bus may move MIPS into ARM territory
Latest White Papers
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions