RF system-in-package competes with SoCs

RF system-in-package competes with SoCs
By Roy Buck, Principal Engineer, Analog Devices, Inc., Greensboro, North Carolina, EE Times
August 29, 2002 (9:19 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020821S0029

We regard multichip module (MCM) BGA as an enabling technology that provides high-reliability, compact size, faster time to market and reduced costs for RF circuits. The use of chip capacitors and resistors not only reduces costs but also improves end termination for pre-packaged ICs. MCMs also take advantage of high density, multi-layer interconnects to reduce grounding and EMI issues.

Customer perceptions of MCMs have long viewed them as high priced compared to the same function using discrete components and monolithic packaged ICs. Typically, MCMs used expensive substrate interconnect technology, utilizing either thick film or thin film substrates sealed in a hermetic package.

The package traditionally was a Kovar metal or ceramic co-fired structure, which was hermetically, sealed using a welded seam seal or gold tin solder perform. The substrate was populated with un-packaged die, which had been partially electrically tested at t he wafer level. As such, the assembly resulted in low electrical yields at first test.

With the advent of smaller monolithic packages, increased packing density, finer lines and spaces at the board level — and BGA technology — the MCM can now be made in a lower cost assembly when compared to it's hermetic counterpart. The new approach uses fully tested packaged devices assembled as a system on an un-encapsulated laminate board. This technology provides a cost-competitive product for commercial — as well as industrial and COTS — applications.

The use of MCM subassemblies also helps to ensure that high-speed components, such as RF A/D converters, obtain the performance that their data sheet calls out. Customers have reported problems attaining data sheet performance when their highest speed data converters are mounted directly on circuit boards. The design of the subsystem can utilize active components along with matching passives (capacitors, resistors, transforme rs).

The performance of the subsystem-including grounding, cross talk elimination and signal to noise reduction- can be optimized to provide peak performance for the active devices.

Redundancy is provided in the I/O to assure no loss of performance or rework will be required due to an open on one of the I/O balls. The I/O assignment has been optimized to provide the user with the easiest possible layout of the pc board. In reality, all of the signal, clock and BIT I/Os could be routed on the top layer of the customer's board, eliminating the need for additional layers through hole or vias depending on the users design. The grounds and power I/Os are also routed to redundant balls. This can result in reduced layers/cost for the user and improved reliability.

Innovation lies in the marriage of various processes. A user developing these same functions with all discrete components, would normally use a FR4 material to construct the pc board . In order to obtain optimal performance, mul tiple layers would need to be used in the area of this function. These multiple layers may not be required for the rest of the system board. Therefore, the over pc board cost is higher than that required if the same function could be realized in fewer layers.

The MCM BGA is normally assembled on a two or four layer substrate using a BT (bismaleimide-triazine) resin. The rigidity of the substrate is important at RF frequencies, since the trace lengths invariably represent some multiple of the wavelength. Any flexing of the substrate could result in an attenuation of the RF signal or amplification of an unwanted harmonic. This substrate is normally in the order of 20 mils (0.5mm) thick.

Varying yields
For High Rel applications, an epoxy is molded over the otherwise exposed semiconductor die protection and stabilization. Usually a costly build up process is used for the fabrication of the substrate to provide an area for the die that is free from holes and vias. This helps reduce m oisture intrusion and facilitates the over mold process. The passive components may be attached with either conductive epoxy or solder. Designs incorporating more than one active component (usually only two) and passives are often called a System-In-Package (SiP).

This assembly is also over molded for protection and stabilization. Electrical yields on SiPs are subject to variation due to the electrical yield of the exposed active components. This yield can be increased by using a KGD (Known Good Die) measure, but KGD use results in substantially increased material cost. In other words, you're asking your semiconductor supplier to conduct additional tests in your behalf.

The design recommended here marries the dimensionally stable BT resin, with it's higher thermal stability and reliability, proven over the years in PBGA packages, with the more conventional pc board d esign; that is, one using pre-packaged ICs rather than bare die. Additionally, increasing the substrate thickness to approximately 40 mils (1 mm) will assure the flatness of the final assembly for RF devices that must be mounted on the same plane.

A through-hole process with interconnect vias also reduces costs. These holes are plugged on one side or tented with the solder mask to facilitate an inexpensive assembly process and avoid scavenging of the solder by the through holes. The limitation on the number of layers used is based on limits of the conventional pc board and not any other technical requirement.

Thermal vias are used in MCMs like this to reduce the junction temperature of the active components and spread the heat uniformly as possible. Power and ground metalization may be added or removed based on thermal and electrical requirement as well as mechanical requirements to provide a balanced design. The thermal load of the assembly, in fact, can be spread over the larger area of the substrate along the ground and power planes then vertically through the board by use of thermal and functional vias/through holes. This can result in improved thermal performance if appropriate placement of the thermal vias is considered during layout.

An optional thermal spreader/heat sink may be used with airflow for further reductions in junction temperatures if required. This approach will cause the system board to remain cooler and thermally sensitive components located on the system board will not be exposed to the high temperature.

An MCM subsystem addresses the markets which desire the RF functionality available in the hermetic module, but which do not need the elevated reliability or manufacturing cost of a hermetically sealed MCM. A SiP using BGA packaging marries elements of existing technology to produce a component with enhanced functionality, high reliability, small outline and competitive cost.