Realising the Full Potential of Multi-core Designs

by Mark Lippett, Ignios

Multi-core chips offer performance, scalability, low-power and flexibility, but are they useable by software engineers? New start-up, Ignios, is addressing these issues.

ASIC, ASSP, FPGA and other System on Chip (SoC) designs containing multiple processor cores are becoming the preferred hardware platforms for many applications. Compared with uni-processor architectures, multi-core chips have the potential to provide a far higher level of price-performance. These chips combine specialist engines within a single design, which may include any configuration of multiple CPUs, DSPs and co-processors. With multi-core, a new class of flexible software-programmable designs are permeating the SoC and merchant semiconductor market. According to analysts, the multi-processor SoC segment is forecast to grow at a compound annual rate of around 30 percent.

Recent multi-core commercial designs target applications such as network processors, recordable DVDs, set-top boxes, HDTV platforms, mobile handsets and many others. The number of cores within a single design ranges from a couple to over 150. The most prevalent example of a multi-core application is the ubiquitous mobile handset; many GSM devices contain a single digital chip comprising a DSP for baseband processing and a general-purpose processor for handling the application requirements.

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