Automotive System & Software Development Challenges - Part 2
Frank Schirrmeister, Cadence Design Systems
EDN (November 12, 2013)
Part 1 of this article discussed automotive design chains and their dynamics, as well as software and networking challenges in automotive. We closed with a discussion of the different development engines for chip and system design – virtual prototyping, RTL simulation, acceleration/emulation and FPGA based prototyping.
To read the full article, click here
Related Semiconductor IP
- Wi-Fi 7(be) RF Transceiver IP in TSMC 22nm
- PUF FPGA-Xilinx Premium with key wrap
- ASIL-B Ready PUF Hardware Premium with key wrap and certification support
- ASIL-B Ready PUF Hardware Base
- PUF Software Premium with key wrap and certification support
Related White Papers
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- DSP system design, part 2: Critical design choices
- Providing memory system and compiler support for MPSoc designs: Customization of memory architectures (Part 2)
Latest White Papers
- e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
- How to design secure SoCs, Part II: Key Management
- Seven Key Advantages of Implementing eFPGA with Soft IP vs. Hard IP
- Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU
- Data Movement Is the Energy Bottleneck of Today’s SoCs