Automotive System & Software Development Challenges - Part 2
Frank Schirrmeister, Cadence Design Systems
EDN (November 12, 2013)
Part 1 of this article discussed automotive design chains and their dynamics, as well as software and networking challenges in automotive. We closed with a discussion of the different development engines for chip and system design – virtual prototyping, RTL simulation, acceleration/emulation and FPGA based prototyping.
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related White Papers
- Automotive System & Software Development Challenges - Part 1
- Dealing with automotive software complexity with virtual prototyping - Part 1: Virtual HIL development basics
- Providing memory system and compiler support for MPSoc designs: Customization of memory architectures (Part 2)
- Using model-driven development to reduce system software security vulnerabilities
Latest White Papers
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design
- CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
- Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
- Automating NoC Design to Tackle Rising SoC Complexity