Xilinx Expands into New Applications with Cost-Optimized UltraScale+ Portfolio for Ultra-Compact, High-Performance Edge Compute
Enhanced scalability with low power and cost in new form factors enable UltraScale+ devices for numerous growth market opportunities ranging from IoT to networking
SAN JOSE, Calif.-- Mar 16, 2021 -- Xilinx, Inc., (NASDAQ: XLNX), the leader in adaptive computing, today announced the company has expanded its UltraScale+™ portfolio for markets with new applications that require ultra-compact and intelligent edge solutions. With form factors that are 70 percent smaller than traditional chip-scale packaging, the new Artix® and Zynq® UltraScale+ devices can now address a wider range of applications within the industrial, vision, healthcare, broadcast, consumer, automotive, and networking markets.
Xilinx® Zynq® UltraScale™ + Chip
As the world’s only hardware adaptable cost-optimized portfolio based on 16 nanometer technology, Artix and Zynq UltraScale+ devices are available in TSMC’s state-of-the-art InFO (Integrated Fan-Out) packaging technology. Using InFO, Artix and Zynq UltraScale+ devices meet the need for intelligent edge applications by delivering high-compute density, performance-per-watt, and scalability in compact packaging options.
“Demand for compact, intelligent edge applications is driving the requirement for processing and bandwidth engines to not only provide higher performance, but also new levels of compute density to enable the smallest form factor systems,” said Sumit Shah, senior director, Product Line Management and Marketing at Xilinx. “The new cost-optimized additions to our UltraScale+ portfolio are powerful enhancements that leverage the architecture and production-proven technology of Xilinx’s UltraScale+ FPGAs and MPSoCs, which collectively have been deployed in millions of systems worldwide.”
Artix UltraScale+ FPGAs: Built for High I/O Bandwidth and DSP Compute
The Artix UltraScale+ family is built on its production-proven FPGA architecture and is ideal for a range of applications including machine vision with advanced sensor technology, high-speed networking, and ultra-compact “8K-ready” video broadcasting. Artix UltraScale+ devices deliver 16 gigabits-per-second transceivers to support emerging and advanced protocols in networking, vision, and video, while also delivering the highest DSP compute in its class.
Zynq UltraScale+ MPSoCs: Optimized for Power and Cost
Cost-optimized Zynq UltraScale+ MPSoCs include the new ZU1 and production-proven ZU2 and ZU3 devices, all available in InFO packaging. As part of the multiprocessing SoC line from the Zynq UltraScale+ family, ZU1 is designed for connectivity at the edge and for industrial and healthcare IoT systems, including embedded vision cameras, AV-over-IP 4K and 8K-ready streaming, hand-held test equipment, as well as consumer and medical applications. ZU1 is built for miniaturized compute-intensive applications and powered by a heterogeneous Arm® processor-based multicore processor subsystem, while also being able to migrate to common package footprints for greater compute.
“LUCID has worked closely with Xilinx to integrate the new UltraScale+ ZU3 into our next generation industrial machine vision camera, the Triton Edge,” said Rod Barman, founder and president at LUCID Vision Labs. “With the UltraScale+ ZU3 and its InFO packaging, LUCID was able to utilize an innovative rigid-flex board architecture to squeeze an amazing amount of processing power into an ultra-compact IP67, factory-tough camera.”
Artix and Zynq UltraScale+ are Scalable and Secure
With the addition of Artix devices and the extension to the Zynq UltraScale+ family, Xilinx’s portfolio now spans across the high-end with Virtex® UltraScale+, to the midrange with Kintex® UltraScale+, to the new cost-optimized low-end. These new devices round out the portfolio and provide scalability for customers to develop multiple solutions using the same Xilinx platform. This preserves design investments across the portfolio and speeds time-to-market.
Security is a critical component in Xilinx designs, and both cost-optimized Artix and Zynq UltraScale+ families include the same robust security features found across the UltraScale+ portfolio. Included are RSA-4096 authentication, AES-CGM decryption, DPA countermeasures, and Xilinx’s proprietary Security Monitor IP that adapts to security threats across the product life cycle, meeting the security needs for both defense and commercial projects.
“The ability for customers to scale their designs using a single secure platform for a wide range of applications and markets is key to enabling faster, easier design integration as well as for capturing critical time-to-market opportunities,” said Dan Mandell, senior analyst, IoT and Embedded Technology at VDC Research. “Xilinx’s strategy to expand its portfolio to meet these market needs with its scalable and secure UltraScale+ Artix and Zynq families is compelling, especially considering the strong business opportunities in growth markets where these solutions are being deployed.”
Availability
The first cost-optimized Artix UltraScale+ devices are expected to be available in production by Q3 CY2021, with Vivado® Design Suite and Vitis™ Unified Software Platform tool support starting late summer. Zynq UltraScale+ ZU1 devices will also begin sampling in Q3 with tool support in Q2, and volume production of the extended portfolio beginning Q4.
About Xilinx
Xilinx, Inc. develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the cloud, to the edge, to the endpoint. Xilinx is the inventor of the FPGA and Adaptive SoCs (including our Adaptive Compute Acceleration Platform, or ACAP), designed to deliver the most dynamic computing technology in the industry. We collaborate with our customers to create scalable, differentiated and intelligent solutions that enable the adaptable, intelligent and connected world of the future. For more information, visit xilinx.com.
Related Semiconductor IP
- DisplayPort transmitter IP
- DisplayPort Receiver IP
- HDMI 1.4/2.0/2.1 transmitter IP
- HDMI 1.4/2.0/2.1 receiver IP
- MIPI C-PHY/D-PHY combo Rx
Related News
- Xilinx Advances State-of-the-Art in Integrated and Adaptable Solutions for Aerospace and Defense with Introduction of 16nm Defense-Grade UltraScale+ Portfolio
- Xilinx Extends its Breakthrough Zynq UltraScale+ RFSoC Portfolio to Full sub-6GHz Spectrum Support
- High Performance Channel Coding Solutions on Xilinx Zynq UltraScale+ RFSoC Devices
- Logic Design Solutions Launches NVME Host IP on Xilinx Ultrascale & Ultrascale Plus FPGA
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers