Virage Logic First to Provide Silicon-Proven IP on TSMC Nexsys 90-nm Process
Performs Key Validation Tests to Bring Next Generation Process to Market
FREMONT, Calif., April 22, 2003 — Virage Logic (Nasdaq: VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced the availability of its embedded memory IP for TSMC’s Nexsys™ 90-nanometer (nm) process technology. As the first semiconductor IP company to provide silicon-proven memories on TSMC’s Nexsys 90-nm Generic process, System-on-Chip (SoC) designers can now conduct comparisons of area, speed and power between 130-nm and 90-nm to enable designs starts today and not miss time-to-market pressures. Based on TSMC’s Nexsys 90-nm process technology, Virage Logic’s embedded memory technology is designed to enhance manufacturability through process tuning and close integration with all major electronic design automation (EDA) tools.
“Because of Virage Logic’s silicon-proven IP technology portfolio, Agere’s customers can get complex products to market faster,” said Jon Fields, vice president of design platforms, Agere Systems. “This faster product delivery is vital for Agere’s designs, which are targeted for communications markets. By combining Virage Logic’s high-performance embedded memory technology with TSMC’s Nexsys 90-nm process technology, we’ve been able to provide our customers with the increased bandwidth and functionality that their applications require, while keeping power consumption and system costs low.”
Proven Quality
As part of its quality assurance efforts, Virage Logic’s FirstPass-Silicon™ Characterization Program assures SoC designers that the IP is reliable, manufacturable and will perform to specification. Virage Logic has completed its testing on TSMC’s 90-nm process. The results are available to customers in an extensive silicon characterization report. Key validation tests performed included: cross functionality, failure analysis, minimum/maximum operating voltage range, standby current, operating current, access time, clock skew shmoo, and data retention testing. Customers interested in obtaining a copy of the report may contact their local Virage Logic sales representative or call 1-510-360-8000. Combined with the TSMC-9000™ verification procedure, Virage Logic’s FirstPass-Silicon Characterization Program provides an industry benchmark in quality, reliability and completeness.
“We are committed to providing our customers with best-in-class semiconductor IP platforms that enable them to meet their quality and yield requirements,” said Adam Kablanian, CEO and president, Virage Logic. “By leveraging TSMC’s advanced 90-nm process with our IP, we can deliver the high performance requirements that customers need to build their next generation designs.”
About Virage Logic
Virage Logic Corp. (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os and IP development tools that are silicon proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.
###
SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:
Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
All trademarks and copyrights are property of their respective owners and are protected therein.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Dolphin Integration's memories silicon proven at TSMC 90 nm eFlash
- Synopsys and TSMC Streamline Multi-Die System Complexity with Unified Exploration-to-Signoff Platform and Proven UCIe IP on TSMC N3E Process
- Silicon Creations Expands Clocking IP Portfolio on TSMC N2P Technology including Novel Temperature Sensor Design
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack