sureCore-Led CryoCMOS IP: Toward Scalable Quantum Computers
Saumitra Jagdale, EETimes Europe (August 23, 2023)
sureCore CEO Paul Wells foresees further migration of control electronics “into the cryostat,” i.e., close to the qubits.
Several components of quantum computers need to be at extremely low temperatures—near absolute zero—to produce viable results. This is because quantum bits, or qubits, need to be in a special state to exploit their superpositioning and entanglement properties. Heat can hinder the quantum state of qubits and cause errors in the implemented computations.
The current design of quantum computers, as technology today permits, implements a clear temperature demarcation: the cryogenic region (at extremely low temperatures) housing the qubits, the control electronics region at a temperature warmer than the latter and a room-temperature region containing classical data processing units and communication interfaces. Connecting these well-defined temperature regions requires special wiring and cables, which are often bulky. And with the quantum computing industry trailblazing toward scalability, the performance-limiting cabling is a significant challenge.
Conversely, the special cables only reduce, not eliminate, the disturbance caused by housing the control electronics nearby. There is a requirement to reduce noise caused by heat generation in the control electronics to get closer to meaningful quantum computers.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- sureCore announces development of cryo-CMOS IP that will unlock Quantum Computing's potential
- sureCore-led consortium wins £6.5M Innovate UK grant to develop cryogenic CMOS IP to accelerate Quantum Computing scalability
- CEA and Startup C12 Join Forces to Develop Next-Generation Quantum Computers with Multi-Qubit Chips at Wafer Scale
- NIST to Standardize Encryption Algorithms That Can Resist Attack by Quantum Computers
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack