Silicon & Software Systems (S3) is appointed as the world's first Designated Design House for Toshiba's MeP
Dublin, Ireland, 11th December 2003 - Silicon & Software Systems (S3), one of Europe's largest System on Chip design houses, today announced that it has been appointed as the world's first Designated Design House for Toshiba's Media embedded Processor (MeP). S3 is now formally authorized to engage in complete System on Chip designs using Toshiba's configurable MeP core and to design and supply supporting IP blocks.
S3 has already successfully completed the design of an MeP co-processor module for Toshiba: an IEEE-754 compliant Floating Point Unit (FPU) with performance exceeding 220MHz. S3 is also a member of Toshiba's MeP@SoCation, a program established by Toshiba to provide information and support for the MeP community.
"We are delighted with this formal appointment by Toshiba," said James O'Riordan, Chief Technology Officer of S3. "As a true System on Chip design company, we address both hardware and software design and are ideally positioned to deliver state-of-the-art solutions incorporating Toshiba's MeP technology."
Speaking on behalf of Toshiba's Semiconductor Company, Dr. Tohru Furuyama, General Manager, SoC Research & Development Center said, "Having successfully engaged with S3 for the design of the FPU, we are confident that their expertise and ability to deliver will contribute greatly to the success of MeP in the market-place. It is our strong desire to enhance such engagements with partner design houses in order to increase the MeP based IP and/or System on Chip design capability worldwide".
About Silicon & Software Systems Ltd. (S3):
S3 is an established designer of complex System on Chip (SoC) solutions with a 12-year track record in this area. S3 provide faster time-to-market for SoC designs by using in-house, customer and third party IP combined with state-of-the-art IC and Software design methodologies, tools and processes. The company's target markets for SoC include Digital Consumer and Wireless Systems.
S3's success is based on multi-discipline design expertise is areas such as Digital IC, Mixed Signal, RF, DSP and FPGA. This portfolio is complemented with Embedded Software design expertise coupled with S3's in-depth applications knowledge and customizable IP.
Approximately 50% of S3's clients are U.S. based with the remainder based in Europe and the Asia/Pacific region. S3 was founded in Dublin, Ireland in 1986 and has operations in five countries: Ireland, U.S., the Netherlands, Poland and the Czech Republic.
Silicon & Software Systems web site: www.s3group.com
Toshiba MeP web site: www.mepcore.com
# # #All trademarks contained herein (whether registered or not) and all associated rights are recognized.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- NoC Verification IP
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
Related News
- Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems to Transform AI-Driven Silicon, Systems and Drug Design
- CEVA Acquires Spatial Audio Business from VisiSonics to Expand its Application Software Portfolio for Embedded Systems targeting Hearables and other Consumer IoT Markets
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
Latest News
- Presto Engineering Group Acquires Garfield Microelectronics Ltd, Creating Europe’s Most Comprehensive ASIC Design to Production One-Stop-Shop
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms