Silicon Access Networks Broadens IP Offering: Full I/O cell library in TSMC 0.13G to be offered in addition to NPSI and SFI IP blocks

Silicon Access Networks Broadens IP Offering: Full I/O cell library in TSMC 0.13G to be offered in addition to NPSI and SFI IP blocks

SAN JOSE, Calif. - March 18, 2003 - Silicon Access Networks, an industry leader in semiconductor data path processing solutions, today announced the broadening of it's IP portfolio to include the Network Processor Streaming Interface (NPSI) and SERDES Framer Interface (SFI-4) I/O macros. In addition, Silicon Access Networks is offering a complete I/O cell library including HSTL-2, SSTL-2, ZBT and PCI I/Os, PLLs, Clock Synthesizers and a broad suite of CMOS cells - available as hard macros targeted to TSMC 0.13G process.

NPSI (NPF-SI-1-01.0) is a variant of OIF's SPI 4.2 standard that was the first IP offering from Silicon Access Networks' IP Business Unit in January 2002. SFI (OIF-PLL-02.0) defines an electrical interface between a SONET/SDH framer and the high-speed SERDES logic.

"We have seen tremendous success with our SPI 4.2 offering and there has been continued demand for variations of the same", said Vishal S. Kapoor, General Manager for Silicon Access Networks' IP Business Unit. "This broadened portfolio enables our IP customers in two ways - the iNPSI and iSFI offerings round off the high-speed I/O offering for the networking market, adding to the highly successful existing SPI 4.2 IP, while the I/IO cell library allows customers to build a complete I/O ring. With shrinking ASIC design teams, these products will enable our customers to shorten their time-to-market by delivering fundamental and difficult to develop IP blocks."

The standard I/Os and PLLs will be offered as hard macros targeted to 0.13-micron TSMC process (CL013G). The IP will be licensed as encrypted synthesizable Verilog for the Link Layer (iNPSI-Link and iSFI-Link) and as a hard-macro targeted to 0.13-micron TSMC process (CL013G) for the LVDS Physical Layer (iNPSI-PHY and iSFI-PHY) blocks.

About the Technology:
The I/O drivers and receivers used in the hard macros being offered are silicon-proven and are used in Silicon Access Networks iFlow Products that have been in production for three quarters.

About Silicon Access Networks:
Silicon Access Networks, a communications semiconductor company, offers the only complete Data Path Processing Platform (DP3) solution for wide area, metropolitan and enterprise switching and routing applications. The iFlow DP3 solution delivers a quantum leap in performance and density over competing solutions. The company is a member of the Network Processing Forum (NPF), the 10 Gigabit Ethernet Alliance, the Optical Internetworking Forum (OIF) and the ATM Forum. For more information, visit http://www.siliconaccess.com/

Silicon Access Networks, the Silicon Access Networks Logo, iFlow, are trademarks of Silicon Access Networks Incorporated. All other trademarks are property of their respective companies.