Denali Software First to Announce Verification IP for PCI Express 3.0 Designs

High-Quality Verification IP Provides Pre-silicon Compliance and Interoperability Verification and Faster TTM to Design Teams Beginning Early Gen 3 Development

SUNNYVALE, Calif. -- September 4, 2008 — Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced the availability of PureSpec™ PCI Express™ (PCIe) verification intellectual property (VIP) product which now supports the latest version of the Gen 3 specifications from the PCI-Special Interest Group (PCI-SIG®), allowing chip designers to begin early Gen 3 development. Denali’s PureSpec PCIe VIP product, a complete solution for modeling and verifying pre-silicon compliance and interoperability for PCIe designs, enables engineers to accelerate the design and verification of PCIe systems, and speed overall deployment of PCI Express technology.

“Having verification IP from Denali this early for the PCI Express 3.0 specification will give developers a chance to work with the latest in interconnect standards,” said John Wiedemeier, PCI Express Tools product marketing manager at LeCroy Corporation. “There is no doubt that companies, like Denali and LeCroy, will help enable the transition to PCI Express 3.0 technology with their industry-leading PCI Express solutions. Denali's PCI Express IP and LeCroy's protocol analysis tools reduce integration issues and speeds time-to-market.”

Denali's PureSpec verification IP software for the PCI Express protocol keeps pace with the PCI Express technology and specification as it continues to evolve. The upcoming PCIe 3.0 specification is the next evolution of PCIe technology and includes interconnect performance improvements, full compatibility with prior generations, and PCIe 1.x and 2.0 cards will seamlessly plug into PCIe 3.0-capable slots. All PCIe 3.0 cards will plug into PCIe 1.x and PCIe 2.0-capable slots. The PCIe 3.0 specification removes the requirement for 8b/10b encoding and uses it uses a 128/130 code and physical layer encapsulation.

“Our customers depend on high-quality verification IP solutions that are in step with the latest revisions from the PCI-SIG and we look forward to providing them the highest level of technology expertise,” states Sanjiv Kumar, director, Verification Products at Denali Software. “Our verification IP products not only support the next-generation protocol requirements for design and verification of PCI Express systems, but accelerate our customers’ design cycles and provide them with a clear roadmap for incorporating the latest specifications for their deployment of PCI Express technology.”

About PureSpec PCIe Verification IP

Denali’s PureSpec is the most widely used verification IP product for PCIe technology; over 250 PCIe designs have been validated using PureSpec verification IP. All PureSpec products are directly integrated into all popular EDA languages and verification environments including: Verilog, SystemVerilog, VHDL, C/C++, SystemC, 'e', OpenVERA. Quality, completeness and seamless integration with all modern verification environments, e.g., OVM, VMM, eRM, etc., make PureSpec the solution of choice for functional verification and interoperability validation of PCIe designs. For more information about PureSpec, visit: http://www.denali.com/purespec.

Denali Software, Inc., is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.