Palmchip introduces IDE host controller IP core
Palmchip introduces IDE host controller IP core
By Michael Santarini, EE Times
May 1, 2000 (10:34 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000501S0014
Palmchip Corp. (San Jose, Calif.) has announced the availability of the BK-3709 IDE host controller intellectual property (IP) core.
The core, designed for easy integration into system-on-chip designs, provides a complete IDE host controller subsystem, the company said.
Using the BK-3709 core, the company said, system OEMs and fabless semiconductor companies can develop IDE host controller solutions faster and with lower development costs.
Palmchip claims the BK-3709 IDE host controller includes all of the digital circuitry needed to provide a complete interface between a host processor system and an IDE- or Atapi-compatible hard-drive subsystem or device.
The BK-3709 includes programmed I/O (PIO), multiword direct memory access (DMA) and Ultra ATA interface circuitry. It supports up to four separate hard-disk-drive device files.
The BK-3709 core also supports primary and secondary data channels with independent o r combined interrupts.
The design supports PIO modes 1 through 4; multiword DMA modes 0, 1 and 2; and synchronous Ultra ATA-33 and -66 modes 0 through 4.
An enhanced version, the BK-3710, featuring higher performance and Intel register-set compatibility, will be available in late June.
Palmchip said the BK-3709 IDE host controller core is shipped as RTL Verilog source code, but documentation, synthesis scripts and a testbench are also available.
The testbench includes the RTL source code, a simulation harness, models for the ATA slave devices, DMA and control interfaces, and test stimulus.
Palmchip and Altera Corp. also said last month that they would make the IDE host controller available this year through the Altera Megafunction Partners Program. Pricing for the Altera netlist version will be announced when the core is available through the program.
Visit www.palmchip.com.
Related Semiconductor IP
- HBM4 PHY IP
- eFuse Controller IP
- Secure Storage Solution for OTP IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
Related News
- DI3CM-HCI, A High-Performance MIPI I3C Host Controller IP Core for Next-Generation Embedded Designs
- CAST Introduces Microsecond Channel Controller IP Core for Automotive Power and Sensor Interfaces
- Digital Blocks DB9000 Display Controller IP Core Family Extends Leadership in 8K, Automotive, Medical, Aerospace, and Industrial SoC Designs
- Palmchip Announces Advanced IDE Host Controller IP Core to Reduce Hard Disk Interface Development Time and Cost
Latest News
- LTSCT and Andes Technology Sign Strategic IP Licensing Master Agreement to accelerate RISC-V Based Advanced Semiconductor Solutions
- Global Semiconductor Sales Increase 29.8% Year-to-Year in November
- BAE Systems Licenses Time Sensitive Networking (TSN) Ethernet IP Cores from CAST
- HBM4 Mass Production Delayed to End of 1Q26 By Spec Upgrades and Nvidia Strategy Adjustments
- ASICLAND Secures USD 17.6 Million Storage Controller Mass Production Contract