Movidius Beefs up HW Acceleration in AI Chip
Junko Yoshida, EETimes
8/28/2017 01:31 PM EDT
MADISON, Wis. — Announcements about so-called deep learning processors are becoming almost as frequent nowadays as tweets from the White House. As the technology industry's appetite for neural networks grows, so does the demand for powerful, but very low-power inference engines adaptable to a variety of embedded systems.
Against that backdrop, Movidius, a subsidiary of Intel, launched Monday (Aug. 28) its Myriad X vision processing unit, a follow-up, after 18 months, to the Myriad 2.
Asked what separates Myriad X from other deep-learning chips announced in recent months, Remi El-Ouazzane, vice president and general manager of Movidius’ Intel New Technology Group, told us, “None of those are shipping. Myriad processors are.”
To read the full article, click here
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
- CAN-FD Controller
Related News
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- DEEPX Signs 2nm Process Agreement with Samsung Foundry to Develop World’s First On-Device Generative AI Chip ‘DX-M2’
- Upbeat Technology and SiFive Introduce Next-Gen Ultra-Low Power RISC-V MCU with AI Acceleration
- ChipAgents Raises Oversubscribed $21M Series A to Redefine AI for Chip Design
Latest News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP