Moortec to Showcase its High Accuracy Embedded Sensing Fabric at DAC 2019 in Las Vegas
May 30, 2019 -- Moortec will be showcasing its range of PVT Monitoring Subsystem Solutions supporting advanced node processes at the Design Automation Conference (DAC) 2019 which is taking place at the Las Vegas Convention Centre from Sunday 2nd June until Thursday 6th June. The exhibition runs for three days from the Monday to the Wednesday.
Visit booth #523 to learn more about Moortec’s range of silicon proven, ‘off the shelf’ monitoring IP solutions. Moortec monitoring IP is used by a wide range of customers worldwide for monitoring and controlling conditions on-chip to optimise performance, save power, increase reliability and cut costs.
Moortec provide market leading high accuracy, highly featured PVT Subsystem IP for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies on 40nm, down to 7nm. The Moortec Subsystem provides ASIC designers solutions for thermal management, detection of supply anomalies and the identification of process corners.
Of particular relevance at DAC 2019 will be the continued focus on specific applications such as AI, Data Center, Automotive, 5G Networking, Consumer and IoT. As a company Moortec are committed to expanding its advanced node in-chip monitoring portfolio while maintaining their focus as the leading PVT IP vendor.
To arrange a meeting at DAC please email ramsay.allen@moortec.com
For more information please visit www.moortec.com
Related Semiconductor IP
- Power Monitoring System
- Tessent in-life monitoring
- In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N3E
- PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N3E
- Voltage Monitor with Digital Output (Multi-domain supply monitoring), TSMC N3E
Related News
- Moortec's In-Chip Sensing Fabric Enables Deeply Embedded Monitoring of Dynamic Conditions for Picocom's Baseband SoC for 5G Small Cells
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Analog Bits to Demonstrate Power Management and Embedded Clocking and High Accuracy Sensor IP at the TSMC 2024 Open Innovation Platform Ecosystem Forum
- Moortec Provides In-Chip Sensing Fabrics on TSMC N6 Process Technology
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers