Lexra Announces the Fastest 32-BIT RISC Core to Execute MIPS® Instructions* <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
Lexra Announces the Fastest 32-BIT RISC Core to Execute MIPS® Instructions
WALTHAM, MASS (July 19, 1999) – Lexra, a leading developer of processor cores for embedded applications, announced today the LX4280, the fastest 32-bit RISC core available to support the MIPS I® instruction set architecture. The high performance core is ideally suited for networking and telecommunication applications, where performance and MIPS support are important requirements.
Traditionally, high performance has been synonymous with 64-bit architecture among MIPS processor providers. For applications such as cell and packet processing, however, most of the data is 32 bits or less. In these applications, a 64-bit processor consumes more die area and power than necessary. The inefficiency becomes a critical issue when the processor needs to be integrated as a core with other logic to form a system-on-chip. Lexra's new LX4280 delivers 64-bit performance in a 32-bit architecture.
"We are very excited to be the performance leader in the 32-bit embedded RISC core market," stated Charlie Cheng, president and CEO of Lexra. "The LX4280 will help extend the MIPS instruction set architecture into applications where performance and die area are equally important."
LX4280 Overview
At the heart of the LX4280 is a superscalar CPU able to handle two MIPS I instructions per cycle (except for unaligned loads and stores, which are emulated in software). One pipeline supports load/store addressing, coprocessor operations, and customer extensions. The second pipeline executes multiply and divide operations and Lexra's proprietary multiply-accumulate extensions to the MIPS instruction set architecture. Both pipelines execute all ALU operations.
For most embedded applications, Lexra expects up to a 35% performance improvement as a result of the parallel instruction execution. The LX4280 also supports MIPS16™ instructions for code compression, which can reduce the size of on-chip memory by as much as 40%.
The LX4280's CPU pipeline has also been enhanced. Instead of the 5-stage pipeline architecture found in traditional MIPS RISC cores, the LX4280 uses a 6-stage pipeline design. The extra stage reduces the timing pressure on the cache memories, allowing the LX4280 to handle the complexity of the dual-issue superscalar architecture while maintaining an easy to use instruction memory interface.
Finally, to improve real-time interrupt response to networking and communication applications, the LX4280 adds eight hardware-prioritized interrupt signals, each with its own dedicated interrupt vector.
"High performance cell and packet processing is a very good example of the target application at which the LX4280 is aimed," said Pat Hays, CTO of Lexra. "We believe we have designed the features and performance required while keeping the processor small and easy to use."
The LX4280 continues Lexra's tradition of designing efficient processors. The LX4280 will deliver 275 Dhrystone MIPS at 200 MHz (worst case), while occupying less than 3.8 mm2 of die area in a typical 0.18m silicon process. It will consume less than 180 mW of power.
LX4180 and LX4280 Comparison:
The LX4180 and LX4280 are optimized for two different market segments. The LX4180's ultra small die area is well suited for the high volume consumer market, while the LX4280's performance advantage over its competitors will make it attractive to the high-end communication market. The two products are source and object code compatible, and both can take advantage of the same system level building blocks and broad availability of third party development tools.
Pricing and Availability:
The LX4280 will begin first customer shipment (FCS) in Q4, 1999. The SmoothCore™, Lexra's optimized hard macro, will be available in popular foundries such as IBM, TSMC, and UMC in Q1, 2000. A single project license fee for the RTL or SmoothCore is $425,000.
About Lexra:
Lexra, Inc. is a leading microprocessor developer specializing in RISC and DSP cores for the embedded market. In addition to competitive performance, small die size and low power consumption, Lexra's processor cores are also easy to use, easy to port and provide customers with cost effective solutions. Lexra is headquartered in Waltham, MA. Further information can be found at http://www.lexra.com.
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