IBM lowers power 10x on PowerPC 405

IBM lowers power 10x on PowerPC 405
By R. Colin Johnson, EE Times
October 23, 2001 (4:53 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011011S0076

EAST FISHKILL, N.Y. — IBM Corp. will announce a new family of PowerPCs with "smart" power management at the Microprocessor Forum conference next week (October 15-19, San Jose, Calif).

The first member of the new family, the PowerPC 405LP, not only reduces power 10x over previous PowerPCs, but also sports hardware accelerators for speech recognition and encryption. The device is aimed at energy-constrained wireless devices such as cell phones, as well as power-sensitive wired devices such as DSL modems, communications routers and switches.

"There are a number of innovations to reduce the low power of both the active and the standby modes of the 405LP device, which is based on an optimized version of the PowerPC 405 core — a highly-integrated system-on-chip that utilizes the IBM Core Connect internal bus to provide high bandwidth to key peripherals on the chip including a touch panel controller, LCD controller and memory controller, as well as new hardware accelerator cores for speech recognition and encryption. IBM already has over three dozen uniquely manufactured design wins that are based on the 405 core," said IBM's Power PC marketing manager, Dean Parker.

The new 405LP can crunch numbers at over 500 million instructions per second (Mips) while running at 380 MHz on a 1.8-volt power supply and consuming half a watt, but the power drops to just over 50 milliwatts when the clock frequency is dropped to 150 MHz and the voltage to 1 volt, while still crunching numbers at over 200 Mips. The standby power can likewise be reduced 10x using the same intelligent "frequency and voltage scaling" techniques.

"The only other time I've seen this much intelligence is in components that are not commercially available, [namely chips] in satellites, where it actually turns sections of itself on and off, but those chips are all custom. This is the first commercially available chip with this level of intelligence . . . this chip will become a ben chmark for competitors in the future," said analyst Frank Dzubeck, president of Communications Network Architects Inc.

Under the hood

The 405LP bases its power savings on "smart" power management techniques, such as the ability to scale the clock frequency and supply voltage up and down to affect low power consumption over the entire chip.

In addition, the "smart" power management routines enable nearly any part of the IBM PowerPC 405LP to be temporarily turned off by making extensive use of clock gating. Many other commercially available low-power microprocessors use clock gating, but IBM claims to extend the principle to finer granularity than ever, enabling not only entire cores to be turned on and off, but also zooming down to finer scales, such as powering down a single register that is not currently being used.

"The entire chip basically has the capability of clock gating, which is much more extensive use [than previously]," said Parker.

In addition, the chip combines vo ltage reduction with clock freezing in standby modes, thereby enabling the PowerPC 405LP to reduce power to an absolute minimum. In fact, two different standby modes, hibernation and "cryo" mode, enable the device to reduce power nearly to zero, while simultaneously enabling the device to retain "instant response" to outside stimuli, such as depressing a key or touchpad.

"It's critical for handheld and mobile devices to use as little power as possible when not being used. In addition to typical hibernate states, and reducing the voltage to devices, there is a unique mode called cryo-mode in which clocks as well as power to logic are both shut off. Basically the software and registers are scanned out and very little power is dissipated in the device, like a hibernation mode on a PC, but at the same time the cryo-mode enables the device to come on instantly," said Parker.

In cryo-mode, the state of the registers and software can be quickly scanned back into the device, typically with under 200 millisec onds response time, according to Parker. IBM also promises many versions of the 405LP, not only for power-constrained wireless devices, but also for wired devices where power density and the resultant heat generated need to be minimized. Those specialized versions will aim at networking switches, routers and server farms.

IBM will be sampling the new device in the first quarter of 2002.

An audio recording of reporter R. Colin Johnson's full interview with IBM's Dean Parker can be found online at AmpCast.com/RColinJohnson.

More Microprocessor Forum coverage.