Embedded-processor designers wrestle with peripheral-IP issues

Embedded-processor designers wrestle with peripheral-IP issues
By Mark Hachman, EBN
October 1, 1999 (4:47 p.m. EST)
URL: http://www.eetimes.com/story/OEG19991001S0048

After establishing a presence in the embedded-microprocessor-core market, a crop of emerging IP providers is adding peripheral functions to customize and proliferate their wares.

For established chip houses such as IBM Corp., Motorola Inc., and Texas Instruments Inc., the trend is moot. Top-tier suppliers have the breadth and resources to layer peripheral IP on their standard cores in any number of ways, complementing their technology with ASIC and custom services.

But for companies that have made their mark through embedded-core design-whether they're large vendors such as ARM Ltd., or relative newcomers like ARC Cores Inc.-designing a microprocessor is only the beginning.

“The processor by itself is not all that interesting,” said Jim Turley, vice president of marketing for ARC Cores, San Jose.

In one sense, the argument goes a level deeper than the debate as to whether standard products, ASICs, or customer-owned-tooling pro- vides th e best means to get OEM products to market quickly. Embedded-processor suppliers have a whole other set of design options to consider, including instruction-set extensions, the degree of programmability, and the inclusion of peripheral IP.

As a standard-processor core developer, for example, ARM has signed up more than 30 licensees, including its newest member, 3Com Corp. At a dinner reception before this week's Embedded Systems Conference in San Jose, Robin Saxby, chairman and chief executive of ARM's parent company, ARM Holdings Ltd., described the issues confronting this new wave of IP providers.

“If everyone is building the same product, that doesn't do anything,” Saxby said. “The challenge is to develop a standard that allows us to innovate.”

That's not to say that ARM hasn't adapted. The company's peripheral-IP portfolio includes caches, MMUs, class software, and specialized blocks such as TCP/IP stacks and an MP3 audio decoder. “It serves as part of our foundation for designing a complete system,” said John Cornish, director of product marketing for ARM's design facility in Cambridge, England.

ARM's role as an IP provider has also caused it to become an IP integrator for companies such as Ericsson Inc., which is licensing its Bluetooth core IP to ARM for use in future networking products. “We think it's a way to concentrate on the things we're good at, and let ARM design [the Bluetooth chip] into production without [passing along] the design cost to you,” said Per Svensson, who is responsible for IP licensing at Ericsson.

With customers pressuring their IP providers to serve up broader offerings, the question arises: Can companies lose revenue by not supplying peripheral IP or customization?

It's a tricky question. Hitachi Ltd. and STMicroelectronics said last week that they consider a shared IP/manufacturing process one of the strongest attributes of their new, jointly designed SH-5 processor.

Conversely, MIPS Technologies Inc., Mountain View, Calif., will introduce its synt hesizeable 64-bit MIPS64 5Kc Opal core next week, which sports a coprocessor interface. For now, it's the customer's responsibility to design the coprocessor, although the decision was made to allow the flexibility to source different floating-point cores, said Bruno Kajiyama, the company's product line manager. IBM's Book E extensions to the PowerPC architecture take a similar approach.

At this time, MIPS has not announced any third-party support for the coprocessor. If none can be found, the company will have to go it alone. “We concentrate on microprocessor IP, leaving it up to our customer to work with our partners like NEC or TI,” Kajiyama said. “We're looking at providing some additional peripheral IP, but we have no announced plans as yet.”

Even MIPS' rivals warn that there is always the concern that crafting generic IP is akin to reinventing the wheel. “If we need a generic UART that everybody has, there's no sense in designing it,” when it can be licensed, said ARC Cores' Turley.

Neverth eless, the savings realized by offering peripheral IP can be dramatic, Turley said. Since ARC will give away a core like a hardware MAC, customers save a “huge” amount of time and money by not sourcing it themselves, he said. “We'll go [designing peripheral IP] until we run out of people.”

Ironically, one of the most aggressive vendors in the embedded space has no publicly disclosed IP strategy. Intel Corp., which has purchased embedded cores through companies such as Digital Semiconductors and Level One Communications Inc., apparently has no plans to distribute its products other than as discrete chips.

“We're in the chip business, not the IP business,” said Todd Trammell, handheld market segment development manager for StrongARM products at Intel's Applied Computing Products Division in Austin, Texas.

In fact, Intel believes the foundation of the Internet will be built on standard building blocks, as evidenced by the Industrial PC and Transactional PC reference designs it circulated at the Embe dded Systems Conference.

For instance, Intel's vision of the Industrial PC combines a discrete Coppermine microprocessor with a chipset, embedded graphics controller, LAN interface, PCI bridge, and flash memory-all manufactured by Intel, save for some added DRAM. The I/O-centric Transactional PC contains far fewer Intel components, although the company apparently acquired the necessary technology through a licensing deal struck last month with Standard Microsystems Inc.

“Increasingly, all those processing products-things like the point-of-sale terminal, the Industrial PC-they have to evolve at the speed of the Internet,” said Ron Smith, vice president and general manager of Intel's Computing Enhancement Group, Folsom, Calif. “They have to provide a competitive performance for handling that kind of information platform. And that means that the classic embedded approach to life, which is that we'll go tool something specialized for this application that's going to survive for 20 years, that model's cha nging.

“Device cycles for these products are becoming much, much shorter,” Smith added. “And what it means is that more and more applications are going to use standard building blocks.”

Of course, plenty of companies think that approach is flawed. A CPU may be only 30,000 gates out of a 1 million-gate implementation, noted Bernie Rosenthal, vice president of marketing and business development for Tensilica Inc., Santa Clara, Calif. The company's Xtensa architecture relies on the Tensilica Instruction Extension language to allow designers to develop their own instructions and increase flexibility.

“It's the software, stupid,” Rosenthal said. “If everybody is using the same thing, where does the differentiation come from?”

(Additional reporting by Crista Souza)