Atrenta Announces SpyGlass-Physical for Early Implementation Analysis

New Product Brings Physical Knowledge to Early Design Closure®

ANAHEIM, Calif.--June 15, 2010--Atrenta Inc., the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow, announced today at the 47th Design Automation Conference the availability of the SpyGlass®-Physical product. The new addition to the SpyGlass family enables register transfer level (RTL) engineers to achieve faster design closure by modeling physical implementation effects at the RTL stage of the design.

The SpyGlass-Physical product provides early estimates of area, power, timing and routability for RTL designers without the need for physical design expertise or tools. The product helps to achieve performance targets in concurrent block/SoC development processes by using a rich set of interactive implementation analysis features. The result is enhanced guidance for the actual implementation of both IPs and full-chip SoCs. SpyGlass-Physical is the result of several years of development and close cooperation with strategic Atrenta customers. Existing SpyGlass users can easily integrate the product into their design flow and realize the substantial benefits of early physical implementation modeling.

“The timing and physical closure of our SoCs has always been a big challenge for us,” said François Rémond, Director of CAD, STMicroelectronics. “We needed a tool that would partition our SoCs based on our requirements, and provide trade-off analysis and guidance for our implementation tools. The SpyGlass-Physical product was able to achieve just that on 40nm and 32nm SoCs in significantly shorter time than we expected. We are delighted with these results and plan to use it on our next generation SoCs.”

“Chip design companies have a great need to reach faster design closure than what is supported by current flows,” said Dr. Ajoy Bose, chairman, president and CEO of Atrenta. “The ability to model the impact of physical implementation on the design at an early stage is a critical aspect that is missing from today’s RTL flows. The SpyGlass-Physical product addresses this gap by providing early estimates of area, power, timing and routing congestion. I am confident that our customers will see substantial benefits from this groundbreaking new product.”

SpyGlass-Physical is currently in limited deployment at Atrenta’s strategic customers.

About Atrenta

Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world’s top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. For more information, visit www.atrenta.com.

×
Semiconductor IP