Digital Blocks Announces the DB9000AVLN TFT LCD Controller IP Core
Specifically targeted for TFT LCD panels and the Altera NIOS II Avalon Bus, the DB9000AVLN is an out-of-the-box soft IP Core for display system designers.
GLEN ROCK, New Jersey, January 31, 2007 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for embedded processor and video system designers, today announces the DB9000AVLN TFT LCD Controller IP Core. The DB9000AVLN IP Core targets Altera NIOS II embedded processors with the Avalon Bus requiring TFT LCD panel system requirements.
The DB9000AVLN IP Core specifically and cost-effectively targets TFT LCD panels with 1 Port of 18-bit digital (6-bits/color) or 24-bit digital (8-bits/color) interface. This includes single LVDS/TMDS ports with appropriate external drivers.
The DB9000AVLN IP Core contains programmable features comparable to entry-level ASSP LCD controller chips, including a color palette to reduce frame buffer space and Avalon bus bandwidth. With the cores wide range of programming parameters, the controller can support a wide range of LCD panel resolutions. Representative examples are as follows:
| Format | Resolution |
| Square | 240x240 |
| QVGA | 320x240 |
| 240x320 | |
| 16:9 Aspect Ratio | 480x272 |
| VGA | 640x480 |
| SVGA | 800x600 |
| XGA | 1024x768 |
| SXGA | 1280x1024 |
Price and Availability
The DB9000AVLN is available immediately in synthesizable Verilog, along with synthesis scripts, a simulation test bench with expected results, reference design, datasheet, and user manual. For further information, product evaluation, or pricing, please go to Digital Blocks at http://www.digitalblocks.com
About Digital Blocks
Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. Digital Blocks is located at 587 Rock Rd, Glen Rock, NJ 07452 (USA). Phone: +1-201-251-1281; Fax: +1-201-632-4809; Media Contact: info@digitalblocks.com; Sales Inquiries: info@digitalblock.com; On the Web at www.digitalblocks.com
Related Semiconductor IP
- SHA-256 Secure Hash Algorithm IP Core
- EdDSA Curve25519 signature generation engine
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
Related News
- Digital Blocks DB9000 Display Controller IP Core Family Extends Leadership in 8K, Automotive, Medical, Aerospace, and Industrial SoC Designs
- Digital Blocks Announces the TFT LCD Controller Reference Design for Altera FPGA Development Kits based on the DB9000AVLN LCD Controller IP Core
- Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications
- DI3CM-HCI, A High-Performance MIPI I3C Host Controller IP Core for Next-Generation Embedded Designs
Latest News
- BrainChip Unveils Radar Reference Platform to Bridge the ‘Identification Gap’ in Edge AI
- Siemens accelerates AI chip verification to trillion‑cycle scale with NVIDIA technology
- SiFive Raises $400 Million to Accelerate High-Performance RISC-V Data Center Solutions; Company Valuation Now Stands at $3.65 Billion
- IntoPIX Unleashes Zero‑Latency IP Video Streaming With JPEG XS, IPMX & SMPTE 2110 At NAB Show 2026
- OPENEDGES Advances Commercialization of LPDDR6/5X Memory Subsystem IP, Targeting Next-Generation AI and HPC Markets