Core vendors hammer out USB interface issues

Core vendors hammer out USB interface issues
By Rick Merritt, EE Times
July 2, 2003 (6:26 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030702S0052

SAN JOSE, Calif — A group of USB developers, including Philips and ARC International, are hammering out a board-level interface between USB controllers and physical layer (PHY) chips. The so-called Low Pin Count interface is in a 0.8 version draft and is expected to be complete before the end of the year.

While most USB chips today integrate both the controller and PHY functions, the 16-pin LPC interface anticipates the need to link separate controller and PHY chips in future systems. Developers anticipate when controllers move the 90 nm technology, the mixed-signal PHY may need to remain at least initially in an older process and thus a separate chip to avoid voltage swing issues.

In addition, LPC could be used when engineers choose USB controllers and PHYs made in current but different fab processes. It could also be used in certain low-volume systems where a discrete solution makes sense for cost or other reasons.

LPC is generally a board-level instantiation of the existing UTMI/UTMI+ on-chip macrocell USB interface linking a controller and PHY. LPC essentially fills a hole in the existing USB spec. "The original USB spec was written with the assumption that the same company would be developing the controller and the PHY," said Chris Belanger, a USB product marketing manager for ARC.

However, a handful of companies including ARC, Synopsys and Wipro now develop controller cores and as many as ten companies develop USB PHYs, he added.