Core Evaluation Made Easy, SIP protection with Topdown <FONT SIZE=-1>(by Ann Steffora - Electronic News)</FONT>

IP News

Core Evaluation Made Easy, SIP protection with Topdown

Scottsdale, Ariz.--Delivering semiconductor intellectual property (SIP) in a way that doesn't reveal the nuts and bolts is becoming increasing crucial for OEMs that want to enter the market, but fear their crown jewels would be at stake. Protecting SIP is a significant issue since growth of the industry is dependent on the mutual confidence between providers of SIP and their users.

One way to encourage that trust is to streamline the process for SIP consumers to evaluate potential purchases, while preserve the vendor's development value that went into producing their SIP products.

One solution comes from Topdown Design Solutions Inc., of Nashau, N.H., and is being offered through Design And Reuse, based in Grenoble, France, known for its directory of virtual components, software and services for designing systems-on-a-chip (SOCs).

Design And Reuse is providing a downloadable TopProtect simulation model so users can experiment with the protected model in order to help them understand some of the technical and business issues involved in delivering secure SIP for evaluation purposes.

The key benefits to the technology are threefold. First, the technology is machine independent, said Rich Powlowsky, director of business development at Topdown Design Solutions Inc. Since most SIP developers have a single primary "machine" or operating system, as in Sun Solaris, HP-UX or WIndows-NT, their customers may have a separate operating environment. TopProtect allows the SIP provider to generate just one secure model per design, which will execute on any other major machine environment without recompilation, saving much time. The tool converts its machine-independent code to native machine code automatically, when the model is loaded at simulation time, Powlowsky said. This reduces the internal logistical infrastructure to support SIP by as much as three times, he estimated, as the SIP provider will only have one model that executes all major environments. With the other primary solutions from Escalade Corp., Santa Clara, Calif., and Verilog Model Compiler from Synopsys Inc., Mountain View, Calif., the SIP provider must create a new model for every machine type, he continued.

Secondly, Topdown's core CYCLOPS technology, which is the basis of TopProtect, automatically "squeezes" the maximum amount of "events" from an HDL representation, while retaining a "state-equivalent" model of the original HDL-based SIP design.

In the secure SIP delivery realm, this means that the end user gets an accelerated model with a memory image that is 80 to 90 percent smaller than the original HDL and the SIP provider gets an automatic generator of accelerated models, without having to modify the HDL code, he said.

Finally, Topdown is custom licensing definable and embeddable by SIP providers; able to provide custom visibility by hierarchical region or signal; provide SDF timing shells; is language neutral (VHDL or Verilog handled natively), mixed-language (VHDL and Verilog together) and allows the provider to customize debug definition.

Design And Reuse can be found at the www.design-reuse.com Web site.