Altera Updates PowerPlay Early Power Estimator to Reflect Lower Power Consumption of Stratix II FPGAs

San Jose, Calif., February 14, 2005—Altera Corporation (NASDAQ: ALTR) today announced the immediate availability of version 2.1 of the Stratix^® II PowerPlay Early Power Estimator, which has been updated to reflect an up to 47 percent reduced static power consumption of production-qualified Stratix II FPGAs. With the new version of the Stratix II PowerPlay Early Power Estimator, designers can estimate the power consumption of their designs targeting Stratix II FPGAs early in their design process with better accuracy than competing design solutions.

Altera leads the industry in giving customers the design tools they need to accurately predict the power consumption of 90-nm FPGAs. These tools include the industry’s first early power estimator for 90-nm, high-density FPGAs and the only synthesis and simulation-based power estimator that includes worst-case process and temperature conditions. Altera’s Early Power Estimator includes support for:

• Worst-case process and temperature
• Variable ambient temperature
• Reported junction temperature
• Both core and I/O power consumption
• Commercial and industrial device temperature
• All package combinations
• Heat-sinks and air-flow considerations

“The large amount of measured data collected as Stratix II FPGAs move into volume production, and with the elimination of in-rush current in the production devices, enables us to significantly lower our power specifications,” said David Greenfield, Altera’s senior director of product marketing for high-density FPGA products. “However, this is only part of the story. Customers need clear, straightforward information regarding all components of total device power consumption including static and dynamic power across all process, voltage, and temperature variations. Altera delivers this complete solution with a high level of accuracy.”

Altera delivers all the information designers need as early as possible in an FPGA product’s life cycle with a bias toward worst-case estimates. As characterization progresses and data is collected from a large volume of devices, Altera translates the measured data into tighter specifications within Quartus^® II timing and power models. This policy of open communication ensures that designers can successfully develop and quickly ramp their products to volume production.

Stratix II devices, which were the industry’s first 90-nm high-density FPGAs to sample and move into production, deliver industry-leading performance and density while minimizing total power consumption. Built on TSMC’s 90-nm process technology, Stratix II devices are the only FPGAs that use leading-edge Black Diamond low-k dielectric material. The process technology, along with the Stratix II family’s revolutionary adaptive logic module (ALM) based architecture enables a significant performance boost over the previous generation of Stratix devices, while minimizing power consumption. Benchmarks show that Stratix II FPGAs provide an average of 39 percent performance improvement versus the nearest competitor’s high-end devices.

The Stratix II Early Power Estimator version 2.1 is available for immediate download at http://www.altera.com/support/devices/estimator/st2-estimator/st2-power-estimator.html

Altera Corporation (NASDAQ: ALTR) is the world’s pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com

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