Altera's 40-nm Arria II GX FPGAs Achieve PCI-SIG Compliance for PCIe Express 2.0 Specification
SAN JOSE, Calif.-- July 28, 2009
--Altera Corporation today announced its 40-nm Arria® II GX FPGAs are compliant with the PCI Express® (PCIe®) 2.0 specification. The device successfully passed the PCI-SIG® Compliance and Interoperability Tests at the PCI-SIG Workshop and is now included on the PCI-SIG Integrators List. Arria II GX FPGAs achieved compliance for up to x8 lane configurations for PCIe Gen1 end-point applications.
Currently shipping, Altera's mid-range Arria II GX FPGAs feature integrated transceivers with data rates up to 3.75 Gbps, and have a hard, configurable PCIe interface embedded within the device. The device's hard IP block implements PCIe Gen1 (PIPE) PHY-MAC, data link, and transaction layers. This IP block is highly configurable to meet the requirements to support end-point and root-port applications, and is PCIe 2.0 compliant in x1-, x4- and x8-lane configurations.
"Arria II GX FPGAs are the only mid-range FPGAs that have attained PCIe 2.0 compliance," said Luanne Schirrmeister, senior director of component product marketing at Altera. "They offer 25 percent higher performance, up to 50 percent lower price and up to 50 percent lower power compared to competitive FPGAs."
Arria II GX FPGAs are targeted for applications using mainstream protocols such as PCIe and Gigabit Ethernet (GbE). The devices have up to sixteen 3.75-Gbps transceivers, 256K logic elements (LEs) and 8.5 Mbits of internal RAM.
Pricing and Availability
The Arria II GX EP2AGX125 device is currently available. Contact your Altera® sales representative for pricing. For more information about Altera's Arria II GX FPGAs, visit www.altera.com/products/devices/arria-fpgas. To learn more about the PCIe capabilities featured in Arria II GX FPGAs, visit www.altera.com/pr/products/ip/iup/pci-express.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com.
Related Semiconductor IP
- PCI Express PHY
- Multi-Channel Flex DMA IP Core for PCI Express
- PCIe - PCI Express Controller
- PCI Express PIPE PHY Transceiver
- Scalable Switch Intel® FPGA IP for PCI Express
Related News
- NVM Express Delivers 1.2 Specification with New Data Center and Client Features for PCI Express Solid-State Drives
- Altera FPGAs and IP with New Functional Safety Development Board and Reference Designs Reduce SIL 3 Development and Certification Costs for Industrial Designs
- Sercos IP Core Available for Altera Cyclone V FPGAs and SoCs
- CloudWave Licenses Mobiveil's Universal NVM Express Controller IP to Accelerate Design for Database Management System Acceleration
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack