Achronix to Demonstrate Versatility of Speedcore eFPGA Devices Next Week at SEE/MAPLD and Embedded Vision Summit
Santa Clara, Calif., May 15, 2018 –– Achronix Semiconductor Corporation, a leader in field programmable gate array (FPGA)-based hardware accelerator devices and embedded FPGA (eFPGA) intellectual property (IP), will demonstrate the versatility of its Speedcore™ eFPGA devices next week at SEE/MAPLD and Embedded Vision Summit.
Steve Mensor, Achronix’s vice president of marketing, will present “Embedded FPGA (eFPGA) for Processor and Algorithm Acceleration” Wednesday, May 23, at 11:10 a.m. during SEE/MAPLD (Single Event Effects Symposium/Military and Aerospace Programmable Logic Devices Workshop).
Achronix’s booth at both conferences will highlight its eFPGA technology for 5G wireless, high–performance computing (HPC), advanced driver assistance systems (ADAS) and autonomous vehicles, machine learning and computer vision applications.
SEEM/MAPLD’s exhibition will run during meal and coffee breaks between technical sessions Tuesday, May 22, from 9:30 a.m. to 8 p.m. and Wednesday, May 23, from 9:30 a.m. until 1 p.m. at the Marriott La Jolla in San Diego, Calif.
The Embedded Vision Summit Showcase will be open Tuesday from noon until 8 p.m. with a reception from 6 p.m. to 8 p.m. Wednesday hours are 10:30 p.m. until 6 p.m. It will be held at the Santa Clara Convention Center in Santa Clara.
For more information about Achronix, go to: www.achronix.com
About Achronix Semiconductor Corporation
Achronix is a privately held, fabless semiconductor corporation based in Santa Clara, California. The company developed its FPGA technology which is the basis of the Speedster22i FPGAs and Speedcore eFPGA technology. All Achronix FPGA products are supported by its ACE design tools that include integrated support for Synopsys Synplify Pro. The company has sales offices and representatives in the United States, Europe, and China, and has a research and design office in Bangalore, India.
Related Semiconductor IP
- eFPGA
- eFPGA Hard IP Generator
- Radiation-Hardened eFPGA
- eFPGA IP as a synthesizable RTL core
- eFPGA IP - 100% third party standard cells
Related News
- intoPIX to showcase its lightweight compression IP at Embedded Vision Summit 2022 on Lattice Booth
- OPENEDGES To Exhibit its 4-/8-bit mixed-quantization NPU IP at Embedded Vision Summit 2022
- BrainChip Showcases Edge AI Technologies at 2023 Embedded Vision Summit
- BrainChip and Teksun Demonstrate Rapid Adoption of AI Solutions at Embedded Vision Summit
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing