Comcores Announce Availability of flexible eCPRI IP solution
2018-05-08 07:56:00
IP Cores & Design
Chiplet News Archive - Page 504 of 1946
Texas Instruments Expands Lead Among Top Analog Suppliers in 2017
2018-05-07 16:07:00
Analysis & Insight
UltraSoC analytics IP selected by Esperanto Technologies for RISC-V many-core parallel processing in AI and ML applications
2018-05-07 15:24:00
Commercial Deals
Microsemi and SiFive Launch HiFive Unleashed Expansion Board, Enabling Linux Software and Firmware Developers to Build RISC-V PCs for the First Time
2018-05-07 13:33:00
SoC Architecture & Assembly
eWBM selects Dolphin Integration's Single port SRAM and thick oxide standard cell library at GF 55 LPx
2018-05-07 13:10:00
Commercial Deals
NetSpeed and Esperanto Partner to Power SoCs for Artificial Intelligence
2018-05-07 12:22:00
Commercial Deals
True Circuits Signs Multi-year PLL License with Canaan Creative in China
2018-05-07 11:41:00
Commercial Deals
Chips&Media Unveils its first Computer Vision IP
2018-05-07 11:34:00
IP Cores & Design
NovaSparks Introduces Pure FPGA Optmized Market Data Distribution For Microwaves Networks
2018-05-07 09:58:00
SoC Architecture & Assembly
Rambus, GigaDevice, THG Ventures Form Reliance Memory to Develop RRAM
2018-05-07 09:16:00
Strategic Partnerships
QuickLogic Launches Comprehensive QuickAI Platform for Endpoint AI Applications
2018-05-07 08:48:00
SoC Architecture & Assembly
Faraday Monthly Consolidated Sales Report - April 2018
2018-05-07 08:00:00
Financials
StreamDSP Announces Availability of VITA 17.3 sFPDP Gen 3 IP Core
2018-05-07 06:36:00
IP Cores & Design
GUC Monthly Sales Report - Apr 2018
2018-05-07 06:05:00
Financials
Xylon Appoints Sam Kasgorgis New VP of Sales and Marketing for North America
2018-05-04 12:06:00
People & Leadership
OpenMedReady framework will promote data provenance, security, privacy and consent in remote patient monitoring
2018-05-04 10:21:00
SoC Architecture & Assembly
Cambricon Selects Synopsys HAPS for Next-Generation Artificial Intelligence Processor Product
2018-05-04 10:15:00
SoC Architecture & Assembly
Cadence Shortens Automotive Verification Closure with New Verification IP for UFS 3.0, CoaxPress, and HyperRAM
2018-05-03 21:26:00
Verification IP
DFI Group Releases Initial Version of the DFI 5.0 Specification for High-Speed Memory Controller and PHY Interface
2018-05-03 09:40:00
Misc
Algo-Logic Systems Introduces Ultra-low-latency Tick-to-Trade System with Multi-leg Turbo Spreader
2018-05-03 09:13:00
SoC Architecture & Assembly