Sydaap develops World’s First 64 Bit Floating Point FFT/IFFT Hardware Accelerator for N = 4096
July 8, 2013 -- Sydaap develops world’s first 64-bit precision floating point Fast Fourier Transform/Inverse Fast Fourier Transform hardware accelerator module suitable for LTE-Advanced, OFDM and for all such standards that will evolve over the next decade.
Key Features:
- 64 Bit Precision, Floating Point Arithmetic based on IEEE 754
- Radix-2 implementation for samples up to N = 4096
- Dynamically Re-configurable for multiple sample sizes from N = 2 to 4096.
- Clock Frequency of 2.3 GHz with 28 nm technology
- Throughput of one sample output for every clock cycle.
- Initial Latency, Area and RAM size customized for specific customer requirements.
Related Semiconductor IP
- MixedRadix FFT IP Core
- UltraLong FFT
- Pipelined Floating Point FFT IP Core
- FFT Algorithm Accelerator
- 32-512 Point Streaming FFT Core
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