Sydaap develops World’s First 64 Bit Floating Point FFT/IFFT Hardware Accelerator for N = 4096
July 8, 2013 -- Sydaap develops world’s first 64-bit precision floating point Fast Fourier Transform/Inverse Fast Fourier Transform hardware accelerator module suitable for LTE-Advanced, OFDM and for all such standards that will evolve over the next decade.
Key Features:
- 64 Bit Precision, Floating Point Arithmetic based on IEEE 754
- Radix-2 implementation for samples up to N = 4096
- Dynamically Re-configurable for multiple sample sizes from N = 2 to 4096.
- Clock Frequency of 2.3 GHz with 28 nm technology
- Throughput of one sample output for every clock cycle.
- Initial Latency, Area and RAM size customized for specific customer requirements.
Related Semiconductor IP
- FFT Algorithm Accelerator
- 32-512 Point Streaming FFT Core
- ASIP-1 FFT Engine
- General-purpose FFT core
- FFT Intel® FPGA IP Core
Related News
- Cortus Announces the General Availability of a RISC-V Processor Family - from Low End Embedded Controller to 64 bit Processor with Floating Point.
- Cortus Announces FPS6 32 bit Floating Point Microcontroller IP Core for High Performance Control and Signal Processing Applications
- Floating point unit added to Coldfire with enhanced core
- MIPS Technologies and TSMC form strategic alliance to deliver "hard" versions of MIPS 32 and 64 Bit Processor Cores
Latest News
- SEALSQ and IC’Alps Unify Expertise to Deliver Integrated Post-Quantum Cybersecurity and Functional Safety for Autonomous Vehicles
- PUFsecurity’s PUFrt Anchors the Security of Silicon Labs’ SoC to Achieve the Industry’s First PSA Certified Level 4
- The next RISC-V processor frontier: AI
- PQShield joins EU-funded FORTRESS Project: Pioneering Quantum-Safe Secure Boot for Europe’s Digital Future
- PQSecure Achieves NIST CAVP Validation