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eMMC 4.51 IP

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  • SD 3.0 / eMMC 4.51 Hardware Validation Platform
    • SD and MMC memory card interfaces dominate the mobile storage markets such as tablets, smartphones, video camcorders, and many other portable or stationary consumer electronics.
    • Designed to be cost-effective and Linux based this SD 3.0 / eMMC hardware validation platform (HVP) consists of Arasan’s SD3.0/eMMC 4.51 IP mapped into an FPGA offering full-speed physical connectivity to a complementary SoC host or memory card device.
    Block Diagram -- SD 3.0 / eMMC 4.51 Hardware Validation Platform
  • eMMC 4.51 Device Controller IP
    • Compliant to JEDEC JESD84-B45 eMMC 4.51 spec
    • Packed commands for faster processing
    • Supports cache control mechanism
    • Supports eMMC4.51 Security Protocol Commands
    Block Diagram -- eMMC 4.51 Device Controller IP
  • SD 4.1 / SDIO 4.1 / eMMC 4.51 Host Controller IP
    • The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports three key memory card I/O technologies.
    • SD 4.1 Host Controller IP handles all of the timing and interface protocol requirements to access these media as well as processing the commands in hardware thereby scaling in both performance and access speeds.
    Block Diagram -- SD 4.1 / SDIO 4.1 / eMMC 4.51 Host Controller IP
  • SD 3.0/SDIO 3.0/eMMC 4.51 Host Controller Software Stack
    • This is a production-ready software stack for Arasan’s SD 3.0/ SDIO 3.0/ eMMC 4.51 Host Controller IP that is used to connect to SD, SDIO, or eMMC devices.
    • The SD 3.0/eMMC 4.51 stack can also be used for validating a device during its development and integration life cycles thereby helping designers to reduce the time to market for their product.
    Block Diagram -- SD 3.0/SDIO 3.0/eMMC 4.51 Host Controller Software Stack
  • eMMC Host Controller IP
    • The eMMC Host controller IP handles all of the timing and interface protocol requirements to access these media as well as processing the commands in hardware thereby scaling in both performance and access speeds.
    • The eMMC 4.51 Host IP supports connection to a single slot and performs multi-block writes and erases that lower access overhead.
    Block Diagram -- eMMC Host Controller IP
  • Simulation VIP for eMMC
    • High speed modes
    • 200 MB/s Read and Write operation. HS400 Dual Data Rate Read and Write interface
    • General eMMC Functionality
    • 48-bit input command format and R1, R1b, R2 response formats
    Block Diagram -- Simulation VIP for eMMC
  • SD Card Host Controller IP
    • The SD Card Host IP f is a highly integrated host controller IP solution that supports three key memory card I/O technologies:
    • The SD Card Host IP handles all of the timing and interface protocol requirements to access these media as well as processing the commands in hardware thereby scaling in both performance and access speeds.
    Block Diagram -- SD Card Host Controller IP
  • SD 4.1 Host Controller Software Stack
    • This is a production-ready stack for Arasan’s eMMC Host Controller IP that is used to connect to SD, SDIO, or eMMC devices.
    • The SD4/SDIO4/eMMC 4.5.1 Stack can also be used for validating a device during its development and integration life cycles thereby helping designers to reduce the time to market for their product.
    Block Diagram -- SD 4.1 Host Controller Software Stack
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