Ultra Ethernet IP
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168
IP
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Complete 1.6T Ultra Ethernet IP Solution
- Ethernet MAC, PCS and PHY to complete a full Ultra Ethernet interface stack
- Supports evolving IEEE 802.3 and OIF-224G electrical standards
- Provides support for 4 x 400G, 2 x 800G, and 1.6T Ethernet rates using 112Gbps and 224Gbps SerDes
- Meets performance criteria for chip-to-chip, chip-to-module, and long reach copper/backplane interconnects
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40G Ethernet MAC/PCS Ultra Low Latency IP core for FPGAs
- Best-in-class latency from the wire to the user’s own logic. 55 ns RTT — SOP to SOF @ 322 MHz on Xilinx Virtex Ultrascale+
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10G Ultra Low Latency Ethernet Solution
- Ultra low latency MAC; Tx = 12.4ns , Rx = 15.5ns; (32-bit user interface mode)
- Ultra low latency 10GBase-R PCS; Tx = 12.4ns, Rx = 12.4ns
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25G Ultra Low latency, 64-bit Ethernet MAC + PCS Solution (64-bit and 128-bit UI)
- MAC Core Features
- PCS Core Features
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Low-Latency IP 10G Ethernet MAC
- LeWiz MAC tracks the Ethernet line for link detection
- On the receiving side, it:
- On the transmit side, it:
- Driver Support is available for Linux (Windows and others available based on customer request)
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10/100 Ethernet PHY for TSMC 22nm ULP
- TSMC 22nm ULP
- support EEE
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Ethernet MAC 10G/25G
- Delivers Performance
- Highly Configurable
- Feature Rich
- Silicon Agnostic
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10G Ultra Low latency, 32-bit MAC + PCS Solution (32-bit and 64-bit UI)
- MAC Core Features
- PCS Core Features
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25G LL MAC /PCS Ethernet IP for FPGA
- Ultra Low Latency 128 ns packet Round Trip Time (RTT) in Virtex® UltraScale™
- Integrated FCS CRC32 check/generate
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1G Ethernet Switch IP Core
- Up to 16 ports configurable at compile time
- Configurable queuing behavior (round-robin, fair queuing)
- Supports Ethernet Multicast
- Ultra compact size