USB 3.1 IP
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156
IP
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USB 3.1 Cable Marker IP
- The OTC9115 is a complete, low cost, single chip cable marker for USB PD Type-C (baseband) cables.
- In low silicon area and just 4 IOs, the device has been designed exclusively for very high volume Type-C cables with basic marker requirements.
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USB 3.1 PHY
- Supports USB 3.1, PCIe 3.1, DP-TX v1.4/eDP-TX v1.4b, SATA 3, 10G-KR and QSGMII/SGMII
- Multi-protocol support for simultaneous independent links
- Supports SRIS and internal SSC generation
- Supports PCIe L1 sub-states
- Automatic calibration of on-chip termination resistors
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USB 3.1 Host Premium
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to optimize performance vs area
- Lowers overall system power by design
- Supports SuperSpeed and High-Speed modes
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USB 3.1 DRD Premium
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to optimize performance vs area
- Lowers overall system power by design
- Supports SuperSpeed and High-Speed modes
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SuperSpeed USB 3.1 Host Controller Multiport
- Supports SuperSpeed USB power savings modes, Uniform Power Format (UPF) and dual power rails
- Configurable data buffering options to optimize performance vs area
- Lowers overall system power by design
- Supports SuperSpeed and High-Speed modes
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USB 3.1 PHY (10G/5G) - TSMC N5 x1 OTG, North/South Poly Orientation
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
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USB 3.1 PHY (10G/5G) - TSMC N3P X1 OTG, North/South Poly Orientation
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
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USB 3.1 PHY (10G/5G) - TSMC N3A x1 OTG, North/South Poly Orientation for Automotive AEC-Q100 Grade 2
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
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USB 3.1 PHY (10G/5G) - TSMC 7FF x1 OTG, North/South Poly Orientation
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
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USB 3.1 PHY (10G/5G) - TSMC 6FF x1 OTG, North/South Poly Orientation
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
