USB 2.0 PHY IP
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408
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USB 2.0 PHY - TSMC 55ULPeF25 x1, OTG
- Ported to over 50 different processes and configurations ranging from 65-nm to 14/16-nm FinFET
- Supports the USB 2.0 protocol and data rate (480 Mbps)
- Supports the USB Type-C specification
- USB femtoPHY, USB nanoPHY and USB picoPHY offer a tunability feature that allows quick, post-silicon adjustments that occur due to process variations, or unexpected chip and board parasitic, without modifying the existing design
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USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm
- Complies with USB specifications Rev. 2.0 and 1.1
- Complies with UTMI+ specification Level 3, Rev. 1.0
- Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
- Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
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USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- Complies with USB specifications Rev. 2.0 and 1.1
- Complies with UTMI+ specification Level 3, Rev. 1.0
- Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
- Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
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USB 2.0 PHY IP, Silicon Proven in TSMC 16FFC
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
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USB 2.0 PHY
- Designed to the USB 2.0 specification, and operates at High Speed (480Mbps), Full Speed (12Mbps), and Low Speed (1.5Mbps)
- Complies with the UTMI v1.05 specification
- Multiple reference clock supported from 9.6MHz up to 52MHz
- 8-bit 60MHz and 16-bit 30MHz parallel interfaces
- Battery Charging Specification v1.2
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USB 2.0 PHY
- ? 480-Mbps high-speed, 12-Mbps full-speed, and 1.5-Mbps low-speed serial (Host mode only) data transmission rates
- ? Supports high-speed power modes: suspend, resume, and remote wakeup.
- ? USB 2.0 test modes
- ? 45-? termination, 1.5-k? pull-up and 15-k? pull-down resistors with support for independent control of the pull-down resistors
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USB 2.0 PHY IP, Silicon Proven in TSMC 90G
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
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USB 2.0 PHY IP, Silicon Proven in TSMC 65LP
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
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USB 2.0 PHY IP, Silicon Proven in TSMC 55LP
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
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USB 2.0 PHY IP, Silicon Proven in TSMC 12FFC
- Compliant with USB2.0 and USB1.1 specification
- Compliant with UTMI Specification Version level 3.
- Supports HS(480Mbps)/FS(12Mbps) /LS(1.5Mbps) modes
- All required terminations, including 1.5Kohm pullup on DP and DM, and 15Kohm pull-down on DP and DM are internal to chip
