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USB 2.0 Device Controller IP

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Compare 224 IP from 24 vendors (1 - 10)
  • USB 2.0 Device Controller version 4 with Active Clock Gating to save active power
    • Configuration options to maximize performance and minimize CPU interrupts
    • Flexible parameters enable easy integration into low and high-latency systems
    • Transfer- or transaction-based processing of USB data based on system requirements
    • Configurable data buffering options to fine-tune performance/ area trade-offs
    Block Diagram -- USB 2.0 Device Controller version 4 with Active Clock Gating to save active power
  • USB 2.0 Device Controller IP
    • The USB 2.0 device controller can be configured to support all types of USB transfers – bulk, interrupt and isochronous. While operating in device mode, it can be dynamically configured to support a configurable number of endpoints, interfaces, alternate interfaces, and settings.
    • The USB 2.0 device controller can be configured to support any combination of USB 2.0 interface speeds – LS (1.5 Mbps), FS (12.0 Mbps), HS (480 Mbps). Sample combinations are LS only, FS only, HS only, LS and FS, and FS and HS.
    • The USB 2.0 device controller supports all low-power features of USB specifications, including suspend, remote wakeup and Link Power Management states – L1, L2.
    • The USB 2.0 device controller supports all test modes features, a requisite for obtaining USB-IF certification
    Block Diagram -- USB 2.0 Device Controller IP
  • USB 2.0 Device Controller with ULPI interface
    • Full compliance with the USB 2.0 specification
    • Full-speed 12 Mbps operation
    • High-speed 480 Mbps operation
  • USB 2.0 Device Controller
    • The Universal Serial Bus Device controller (GRUSBDC) provides an interface between an USB 2.0 bus and an AMBA-AHB bus.
    • The core is used for implementing USB 2.0 functions providing access to the USB device through either an AHB slave or an AHB master interface.
  • USB 2.0 Device Controller
    • Full compliance with the USB 2.0 specification
    • Full-speed 12 Mbps operation
    • High-speed 480 Mbps operation
    • Software configurable EP0 control endpoint size 8-64 bytes
  • AXI USB 2.0 Device Controller
    • AXI-4 based host Interface. AXI-4 Lite for Slave Interface and optional AXI-4 Master interface for DMA mode
    • Supports High Speed and Full Speed USB 2.0 specification
    • Supports high speed, high bandwidth isochronous transactions
    • Supports up to eight endpoints, including one control endpoint 0. Endpoints 1 to 7 can be bulk, interrupt, or isochronous and are individually configurable
  • USB 2.0 Device Controller
    • USB 2.0 compliant
    • Technology and Process independent
    • Supports both UTMI and Philips transceivers
    • Remote Wakeup Feature Support
    • Control,Bulk, Interrupt and Isochronous transfer support
    Block Diagram -- USB 2.0 Device Controller
  • USB 2.0 OTG Dual Role Device (DRD) Controller
    • Compliant with OTG Supplement Rev. 1.0a
    • USB 2.0 Compliant
    • Supports 480 Mbit/s (HS), 12 Mbit/s (FS), and 1.5 Mbit/s (LS)
    • Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP)
    Block Diagram -- USB 2.0 OTG Dual Role Device (DRD) Controller
  • USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only)
    • Configuration options to maximize performance and minimize CPU interrupts
    • Flexible parameters enable easy integration into low and high-latency systems
    • Transfer- or transaction-based processing of USB data based on system requirements
    • Configurable data buffering options to fine-tune performance/ area trade-offs
    Block Diagram -- USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only)
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