USB 2.0 Device Controller

Overview

The Universal Serial Bus Device Controller provides a USB 2.0 function interface accessible from an AMBA-AHB bus interface. The core must be connected to the USB through an external PHY compliant to either UTMI, UTMI+ or ULPI. Both full-speed and high-speed mode are supported.

Endpoints are controlled through a set of registers accessed through an AHB slave interface. Each of the up to 16 IN and 16 OUT endpoints can be individually configured to any of the four USB transfer types.

USB data cargo is moved to the core’s internal buffers using a master or a slave data interface. The data slave interface allows access directly to the internal buffers using AHB transactions and therefore does not need external memory. This makes it suitable for slow and simple functions. The data master interface requires an additional AHB master interface through which data is transferred autonomously using descriptor based DMA. This is suitable for functions requiring large bandwidth.

Key Features

Compatible with USB Specification Rev 2.0 and Rev 1.1
Supports High- (480 Mbit/s) and Full-Speed (12Mbit/s) traffic
Supports all USB transfer types incl. high-bandwidth with maximum payload sizes
Compatible with AMBA specification Rev 2.0
Supports UTMI, UTMI+ and ULPI transceivers
Configurable number of endpoints up to 32 (16 OUT, 16 IN)
AMBA AHB Master DMA interface for high-throughput applications
AMBA AHB Slave interface for low-area applications
Run-time configuration of all endpoints

Benefits

Fully compatible USB 2.0 core
Highly configurable
Fully integrated in the GRLIB IP-library, including AMBA plug&play interface
Evaluation boards available
Low-cost commercial license

Deliverables

VHDL RTL Source code
Synplify project file
Synthesis scripts
Stand-alone VHDL testbench
User's manual
Template design for LEON3 processor
FPGA evaluation board(optional)
Driver for Linux 2.6

Technical Specifications

Foundry, Node

Any

Maturity

Production

Availability

Now

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