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UHS-II IP

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Compare 14 IP from 4 vendors (1 - 10)
  • SD 4.0 UHS-II PHY TSMC 28nm HPM North-South
    • Compliant with SD Specifications Part 1 UHS-II Addendum v1
    • Supports data rate between 390 Mbps to 1.56 Gbps per lane
    • Supports peak interface speed of 3.12 Gbps in Half-duplex mode; 1.56 Gbps in Full-duplex mode
    • Sub-LVDS differential PHY signaling
    Block Diagram -- SD 4.0 UHS-II PHY TSMC 28nm HPM North-South
  • SD 4.0 UHS-II PHY in TSMC 40LP
    • Compliant to SD Specifications Part 1 UHS-II Specification Volume 2: PHY* and SD Specifications Part 1 UHS II
    • Specification Volume 1: System and Protocol”
    • Per lane data rate between 390Mb/s to 1.56Gb/s
    • Supports peak interface speed of 3.12Gb/s (Half-duplex); 1.56Gb/s in Full-duplex mode
    Block Diagram -- SD 4.0 UHS-II PHY in TSMC 40LP
  • UHS-II Device Controller
    • Compliance with Part 1 UHS-II Addendum Version 1.02
    • Compliance with Part A2 SD Host controller specification version 4.10 & Part1 Physical layer specification version 4.20
    • Programmable 1 or 2 Data lane Configuration
    • Supports all type of packets
    Block Diagram -- UHS-II Device Controller
  • SD 4.1 UHS-II PHY for TSMC 12nm FF
    • Compliant to SD Specifications Part 1 UHS-II Specification Volume 2: PHY* and SD Specifications Part 1 UHS II Specification Volume 1: System and Protocol”
  • UHS-II PHY for SD4/SD5 TSMC 12nm FF
    • Compliant with SD Specifications Part 1 UHS-II Addendum v1
    • Supports data rate between 390 Mbps to 1.56 Gbps per lane
  • UHS-II PHY for SD4/SD5 TSMC 16nm FF
    • Compliant with SD Specifications Part 1 UHS-II Addendum v1
    • Supports data rate between 390 Mbps to 1.56 Gbps per lane
  • SD4.0 / UHS-II Host Controller & PHY
    • + Support Standard Capacity (SDSC), High Capacity (SDHC) and Extended Capacity (SDXC) cards
    • + 1 and 4-bit parallel legacy SD interface, and serial UHS-II interface
    • + All bus interface modes: legacy SD (DS, HS, SDR12, SDR25, SDR50, SDR104, DDR50) and UHS-II (FD156, HD312)
    • + Data transfer rate up to 104 Mbps with 4 parallel SD data lines
  • eMMC 5.1 Host Controller
    • Compliant with eMMC Specification Version 5.0
    • Supports one of the following System/Host Interfaces: AHB, AXI or OCP
    Block Diagram -- eMMC 5.1 Host Controller
  • SD4.1 UHS- II PHY IP
    • SD 4.1 compliant SDHC/SDXC UHS-II Physical Layer for Host
    • 16bit interface to Link layer
    • Supports both Full Duplex mode and Half Duplex mode
    Block Diagram -- SD4.1 UHS- II PHY IP
  • Block Diagram -- SD 4.1 SDIO 4.1 Host Controller IP
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