PCIe 4.0 Controller IP
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81
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10)
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PCIe 4.0 Controller with AMBA AXI interface
- Complies with the PCI Express Base 4.0 Specification,
- Supports Endpoint and rootport configuration
- Supports x16, x8, x4, x2, x1 at Gen4, Gen3, Gen2, Gen1 speeds
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PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
- Complies with the PCI Express Base 4.0 Specification, Rev 4.0
- Supports Endpoint, Root-Port, Dual-mode, Switch
- Supports link rate of 2.5, 5.0, 8.0 and 16.0 Gbps per lane.
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PCI Express (PCIe) 4.0 Controller
- Compliant with PCIe 4.0, 3.1, 2.1, and 1.1 specifications
- 32/16b interface for 500MHz or 1GHz core operation
- Modes supported: Root Complex, EndPoint, or Dual Mode
- SR-IOV and multifurcation options
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CCIX 1.1 Controller with AMBA AXI interface
- Controller IP for PCIe 5.0, 4.0, 3.1/3.0 Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations, with CCIX ESM Support and AMBA AXI Interconect User Interface
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PCI Express - Configurable PCI Express 4.0 IP
- Compliant with "PCI Express™ Base Specification, Rev. 4.0 Version 1.0"
- Compliant with "PHY Interface For the PCI Express, SATA, and USB3.1 Architectures"
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Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
- Available in all port types including: Endpoint, Embedded Endpoint, Root Complex, Switch Port, Bridge, Dual Mode (Endpoint/Root Complex), and Multi-Port Switch
- Full Transaction Layer, Data Link Layer and Physical Layer
- Supports up to sixteen 64.0, 32.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
- Available in 32-, 64-, 128-, 256-, 512- or 1024-bit datapath widths for maximum flexibility
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Configurable controllers for PCIe 4.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
- Available in all port types including: Endpoint, Embedded Endpoint, Root Complex, Switch Port, Bridge, Dual Mode (Endpoint/Root Complex), and Multi-Port Switch
- Full Transaction Layer, Data Link Layer and Physical Layer
- Supports up to sixteen 64.0, 32.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
- Available in 32-, 64-, 128-, 256-, 512- or 1024-bit datapath widths for maximum flexibility
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CCIX 1.1 Controller
- Track record of silicon proven PCIe 4.0 designs guarantees first-time silicon success
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PCI Express (PCIe) 5.0 Controller
- Compliant with PCIe 5.0, 4.0, 3.1, 2.1, and 1.1 specifications
- 32/16b interface for 500MHz or 1GHz core operation
- Modes supported: Root Complex, EndPoint, or Dual Mode
- SR-IOV and multifurcation options
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16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
- Support PCIe G1 to G4 with PCS soft-macro supporting PIPE 4.4.1
- Support xPON applications: Sym/Asym GPON, Sym/Asym 10GPON, Sym EPON, Sym/Asym 10GEPON
