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Neuromorphic IP

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  • Neuromorphic Processor
    • Neural Processing Unit (NPU) at memory compute architecture implementing Integrate and fire neuron.
    • Emulate multiple neurons with configurable Synapses.
    • Compute only when events occur.
    • Up-to 4 bits for weights and activation.
    Block Diagram -- Neuromorphic Processor
  • Complete Neural Processor for Edge AI
    • Designed for Low-Power Neural Network Processing
    • Flexible Training Methods
    • Scalable Neuron Fabric
    Block Diagram -- Complete Neural Processor for Edge AI
  • Ultra low power inference engine
    • Neuromorphic processor
    • Sub milliwatt power
    • Ultra-low power AI processing
    Block Diagram -- Ultra low power inference engine
  • NASP PPG IP Block
    • Input and output interfaces are adaptable and configurable for any type of digital bus line or analog signal, tailored to customer requirements.
    Block Diagram -- NASP PPG IP Block
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