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MIPI DSI IP

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Compare 289 IP from 21 vendors (1 - 10)
  • MIPI DSI Transmit Controller v1.3
    • Compliant with the following MIPI specifications
    • DSI Host-side (display module) interface supports
    • Application Processor Connectivity and video/command processing
    • AHB Interface for register configuration and monitoring using programmed IO
    Block Diagram -- MIPI DSI Transmit Controller v1.3
  • MIPI DSI Receiver Controller v1.3
    • Compliant with the following MIPI specifications
    • DSI Host-side interface supports
    • Display Panel Connectivity and video/command processing
    Block Diagram -- MIPI DSI Receiver Controller v1.3
  • MIPI DSI Transmitter v1.2 Controller IP, Compatible with MIPI D-PHY & C-PHY
    • MIPI Alliance Specification for Display Serial
    • MIPI display type 1, type 2, type 3 and type 4
    • Video mode (Non-Burst with Sync Pulses, Non-Burst with Sync Events and same for Burst mode).
    • TE feature (Tearing Effect) for command display
    Block Diagram -- MIPI DSI Transmitter v1.2 Controller IP, Compatible with MIPI D-PHY & C-PHY
  • RGB to MIPI DSI Display Interface Bridge
    • Supports MIPI DSI and MIPI CSI-2 outputs up to 6 Gbp: 1, 2 or 4 data lanes
    • Supports parallel MIPI DPI, CMOS, RAW and RGB interfaces at up to 300 MHz
    • Supports CSI-2 compatible video formats (RAW, RGB, and YUV):
    • Supports DSI compatible video formats (RGB):
    Block Diagram -- RGB to MIPI DSI Display Interface Bridge
  • OpenLDI LVDS to MIPI DSI Display Interface Bridge
    • Supports MIPI DSI Input at up to 12 Gbps
    • Supports OpenLDI LVDS at up to 9.6 Gbps
    • Supports single or dual link LVDS to single or dual MIPI DSI outputs
    • Supports DSI compatible video formats (RGB) :
    Block Diagram -- OpenLDI LVDS to MIPI DSI Display Interface Bridge
  • One Input to Two Output MIPI DSI Display Splitter Bridge
    • Supports MIPI DSI up to 6 Gbps per MIPI D-PHY
    • Provides one or two MIPI DSI outputs
    • Supports all MIPI DSI data types
    • Provides a DCS (Display Command Set) controller to program the display, ROM data used only for DSI in HS or LPDT mode – ROM is programmable by user
    Block Diagram -- One Input to Two Output MIPI DSI Display Splitter Bridge
  • One Input to One Output MIPI DSI Display Interface Bridge
    • Supports MIPI DSI up to 6 Gbps per MIPI D-PHY
    • Provides one or two MIPI DSI outputs
    • Supports all MIPI DSI data types
    • Provides a DCS (Display Command Set) controller to program the display, ROM data used only for DSI in HS or LPDT mode – ROM is programmable by user
    Block Diagram -- One Input to One Output MIPI DSI Display Interface Bridge
  • MIPI DSI to RGB Display Interface Bridge
    • Supports MIPI DSI and MIPI CSI-2 Outputs up to 6 Gbps :
    • Supports parallel MIPI DPI, CMOS, RAW and RGB interfaces at over 150 Mhz
    • Supports CSI-2 compatible video formats (RAW, RGB, and YUV) :
    • Supports DSI compatible video formats (RGB) :
    Block Diagram -- MIPI DSI to RGB Display Interface Bridge
  • MIPI DSI to OpenLDI LVDS Display Interface Bridge
    • Supports MIPI DSI Input at up to 12 Gbps
    • Supports OpenLDI at up to 6.4 Gbps
    • Supports DSI compatible video formats (RGB) :
    • Compliance with MIPI D-PHY Specification v1.1
    Block Diagram -- MIPI DSI to OpenLDI LVDS Display Interface Bridge
  • MIPI DSI TX Controller
    • Compliant with MIPI DSI v1.3.1
    • Supports both Command Mode and Video Mode
    • Supports bi-directional low-power data transmission (LPDT)
    • Cadence Serial Display Interface (SDI), MIPI Display Pixel Interface (DPISM), and Display Compression (DSC) input interface options
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