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GDDR6X IP

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  • GDDR6X Memory Model
    • Supports GDDR6X memory devices from all leading vendors.
    • Supports 100% of GDDR6X protocol draft specification
    • Supports all the GDDR6X commands as per the specs.
    • Supports 2 separate independent channels with point-to-point interface for data, address and command.
    Block Diagram -- GDDR6X Memory Model
  • GDDR6X Controller IIP
    • Supports GDDR6X protocol draft specification.
    • Compliant with DFI-version 4.0 or 5.0 Specification.
    • Supports all the GDDR6X commands as per the specs.
    • Supports up to 16 AXI ports with data width upto 512 bits.
    Block Diagram -- GDDR6X Controller IIP
  • GDDR6X/6 Combo PHY & Controller
    • The GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20Gbps per pin for PAM2 GDDR6 mode and 24Gbps for PAM4 GDDR6X mode
    • The GDDR6X/6 interface supports 2 channels, each with 16 bits for a total data width of 32 bits per memory device
    • With a maximum speed of 20/24Gbps per pin, The GDDR6X/6 Combo PHY delivers a peak bandwidth of up to 80GB/s or 96GB/s per memory device
    Block Diagram -- GDDR6X/6 Combo PHY & Controller
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Semiconductor IP