DisplayPort 1.4 FEC IP

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Compare 6 IP from 4 vendors (1 - 6)
  • DisplayPort 1.4 FEC Transmitter (Tx) ASIL-B
    • VESA DisplayPort 1.4 compliant
    • Reed-Solomon RS (254,250) FEC, 10-bit symbols
    • Two-way interleaving for 1-, 2- and 4-lane modes (4-lane mode requires 2 FEC IP core instances)
    • DisplayPort main 8b/10b encoder included (Tx only)
    Block Diagram -- DisplayPort 1.4 FEC Transmitter (Tx) ASIL-B
  • DisplayPort 1.4 FEC Receiver (Rx)
    • VESA DisplayPort 1.4 compliant
    • Reed-Solomon RS (254,250) FEC, 10-bit symbols
    • Two-way interleaving for 1-, 2- and 4-lane modes (4-lane mode requires 2 FEC IP core instances)
    • DisplayPort main 8b/10b encoder included (Tx only)
    • Status and control can be done with signals or optionally via an integrated APB register module (Rx)
    Block Diagram -- DisplayPort 1.4 FEC Receiver (Rx)
  • VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
    • VESA DisplayPort 1.4 compliant
    • Reed-Solomon RS (254,250) FEC, 10-bit symbols
    • Two-way interleaving for 1-, 2- and 4-lane modes (4-lane mode requires 2 FEC IP core instances)
    • DisplayPort main 8b/10b encoder included (Tx only)
    • Status and control can be done with signals or optionally via an integrated APB register module (Rx)
    Block Diagram -- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
  • Simulation VIP for DisplayPort
    • Device Support
    • Source, Sink, Link Training-Tunable PHY Repeater (LTTPR/retimer)
    • Main Link Interface
    • Serial, Parallel (10-bit, 20-bit, 40-bit)
    Block Diagram -- Simulation VIP for DisplayPort
  • DisplayPort 1.4a IP Core
    • 1,2,3 & 4 lanes
    • 1.62, 2.7, 5.4 and 8.1 Gbps link rate (includes eDP rates)
    • HDCP 1.3 / 2.2
    • MST support, up to 4 streams
  • DisplayPort Receiver Link Controller
    • Silicon proven on multiple ASIC and FPGA processes
    • Capable of operating without a host CPU in low complexity applications
    • Horizontal and vertical video delimiter signals with 1, 2 or 4 pixels per output cycle, supporting up to 16K resolution output; deep color and HDR support
    • 1.62 to 8.1 Gbps link rate across 1, 2, or 4 lanes
    Block Diagram -- DisplayPort Receiver Link Controller
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Semiconductor IP