DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, DELL, Apple etc) DisplayPort is not hindered by license and royalty fees.
The Bitec DisplayPort IP core enables DTV manufacturers to rapidly develop and deliver displays offering a superior viewing experience within ever-shrinking product lifecycles.
The Bitec DisplayPort IP core accepts 1,2 or 4 lanes at either 1.62, 2.7, 5.4 or 8.1 Gbps link rate (includes eDP additional rates), in compliance with the DisplayPort 1.4 specification.
DisplayPort 1.4a IP Core
Overview
Key Features
- 1,2,3 & 4 lanes
- 1.62, 2.7, 5.4 and 8.1 Gbps link rate (includes eDP rates)
- HDCP 1.3 / 2.2
- MST support, up to 4 streams
- 6, 8, 10, 12 & 16 bit color depths
- Forward Error Correction (FEC)
- Display Stream Compression (DSC)
- ASIC Version available
- ALPM Support
- Fully VESA Certified
- Technology Support : Microchip PolarFire, Lattice ECP5, Altera GX devices, ASIC
- Receiver Features
- DisplayPort 1.4a compatible (includes eDP 1.4)
- eDP compatible
- Support for 1,2, 3 & 4-lanes
- Support arbitrary link rates (includes eDP rates)
- Support 8K60 YCbCr4:2:0 resolution
- HDCP 1.3/2.2 (optional)
- 6,8,10,12 & 16 bit color support
- Supports RGB, YCbCr Colorimetric Formats
- MCU (Portable C API) managed or autonomous AUX channel
- AUX Channel messages to 256-byte
- AUX debug channel
- User selectable AUX register SoPC Interface
- SoPC Integration
- Clock Recovery support
- DP 1.4a Multi-Stream support
- FreeSync support
- Global Time Code (GTC)
- 8-Channel Audio Support
- Forward Error Correction (FEC)
- Display Stream Compression 1.2a (DSC) (optional)
- Test Automation for Compliance Testing
- ASIC Version available
- ALPM Support
- Power optimized architecture via clock management
- Fully VESA Certified
- Transmitter Features
- DisplayPort 1.4a compatible (includes eDP 1.4)
- Support for 1,2,3 & 4-lanes
- Support 1.62, 2.7, 5.4 and 8.1 Gbps link rate (includes eDP rates)
- Support 8K60 YCbCr4:2:0 resolution
- HDCP 1.3/2.2 (optional)
- 6,8,10,12 & 16 bit color support
- Supports RGB, YCbCr Colorimetric Formats
- MCU managed AUX channel
- AUX Channel messages to 256-byte
- AUX debug channel
- User selectable AUX register SoPC Interface
- SoPC Integration
- DP++ (DVI/HDMI) compatible
- DP 1.4a Multi-Stream support
- FreeSync support
- LTTPR support
- Global Time Code (GTC)
- 8-Channel Audio Support
- Forward Error Correction (FEC)
- Display Stream Compression 1.2a (DSC) (optional)
- Test Automation for Compliance Testing
- ALPM Support
- Power optimized architecture via clock management
- Fully VESA Certified
Technical Specifications
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