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15
IP
from 9 vendors
(1
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10)
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Lossless & Near-Lossless JPEG-LS Decoder
- JPEG-LS ISO/IEC 14495-1 Standard Support
- Easy to Use and Integrate
- Versions and Throughput
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Graphics Processor Overlay IP Core
- Technology independent soft IP Core for FPGA, ASIC and SoC devices
- Supplied as human-readable VHDL (or Verilog) source code
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Text Overlay Module
- Text overlays on 24-bit RGB video
- Supports video resolutions up to 4K
- Character buffer maps directly to display
- Programmable text-box position
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High Image Quality Super Resolution IP
- Up to 8K @ 60 FPS
- Up to 4 pixels per clock
- FLEXA PSI interface in streaming mode or AXI interface in memory-to-memory mode
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Video Frame Buffer
- Single color, YCbCr 4:2:2, YcbCr 4:4:4 and RGB video formats
- Input and output resolutions of 64x64 to 4Kx4K pixels
- Serial and parallel pixel processing
- Frame rate conversion
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Color Space Converter (CSC)
- Input data width of 8, 10, 12, and 16 bits
- Signed or unsigned input data
- Supports standard configurations as well as custom configurations
- Parameterized coefficients precision from 9 to18 bits
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Versatile Video Input - frame grabber
- Supports versatile digital video input formats - ITU656 and VGA
- Built-in YUV to RGB converter
- Wide range of input and output resolutions from 64x64 to 2048x2048
- Video stream real-time scaling using LMS algorithm
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LogiCore AXI Thin Film Transistor (TFT) Controller
- Connects as 64-bit master on AXI4 bus of 32, 64, or 128 bits data width
- Connects as a 32-bit slave on the AXI4-Lite bus of 32 bits data width
- Parameterizable TFT interface for 18-bit VGA or 24-bit DVI
- Supports 25 MHz TFT clock for display resolution of 640 × 480 pixels at 60Hz refresh rate
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Video Processor and Deinterlacer with Line-Doubled Output
- General
- Deinterlacing
- Low angle directional interpolation
- Film detection
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Real Time Video Image rotation HD up to 1920x1080p60Hz
- Free programmable full
- picture rotation (0-360°)
- Resolution up to 2048x2048
- 1pixel per clock throughput