Crypto Coprocessor IP

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Compare 13 IP from 4 vendors (1 - 10)
  • Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    • 100% CPU offload with low latency and high throughput
    • DPA countermeasures Full software/driver support
    Block Diagram -- Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • TLS 1.3 Compliant Crypto Coprocessor
    • NIST CAVP certified and OSCCA standard compliant crypto engine suite
    • Includes private/public key ciphers, message authentication code, hashes, and key derivation
    • Key wrapping function for the secure export of keys
    • Public-key coprocessor for digital signatures and key agreements over elliptic/Edward curves
    Block Diagram -- TLS 1.3 Compliant Crypto Coprocessor
  • Crypto Coprocessor
    • Comprehensively support all CPU architectures 
    • Crypto engine collective, consisting of private key cipher, message authentication code, hash, and  key derivation functions that are NIST CAVP certified and OSCCA standards compliant 
    • Key wrapping function aiding the export of keys for external use 
    Block Diagram -- Crypto Coprocessor
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Premium)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Premium)
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Compact)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Compact)
  • Secure-IC's Securyzr(TM) Crypto Coprocessor (Standard)
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    Block Diagram -- Secure-IC's Securyzr(TM)  Crypto Coprocessor (Standard)
  • NFC/RFID Controller
    • UMC CMOS 180 nm technology
    • Complete RFID reader solution, including RF front-end and 8051-based MCU
    • Supports ISO14443A* and ISO14443B standards in both reader and card emulation mode
    • Supports NFC Initiator in both Active and Passive modes with speeds 212 and 424 Kbps
    Block Diagram -- NFC/RFID Controller
  • Hardware Root of Trust IP
    • Built-in standard APB controller with privilege control to create secure/non-secure separation. Additionally, interface customization is available for different design requirements.
    • Four 256-bit hardware PUF chip fingerprints, include a self-health check that can be used as a unique identification(UID) or a root key(seed).
    • High-quality true random number generator (TRNG)
    • 8k-bit mass production OTP with built-in instant hardware encryption (customization available)
    Block Diagram -- Hardware Root of Trust IP
  • True Random Number Generator
    • NIST 800-90B compliant
    • AIS-31 start-up and on-line tests (optional)
    • Passed NIST 800-22, 90B and AIS31 test suites
    Block Diagram -- True Random Number Generator
  • Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
    • The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security cores offering security by design for automotive applications.
    • They protect against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.
    Block Diagram -- Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
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