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C-PHY / D-PHY Combo IP

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Search (63)
Compare 63 IP from 11 vendors (1 - 10)
  • MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 8nm
    • Samsung Foundry 5nm low power enhanced (8LPU) CMOS device technology
    • 1.8V±5%, 1.2V±5%, 0.75/0.85V±5% power supply
    Block Diagram -- MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 8nm
  • MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 5nm
    • Low power consumption, small area
    • Supports both overdrive (0.85V) and normal (0.75V) power
    • Support for various lane configurations
    Block Diagram -- MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 5nm
  • MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 4nm
    • Samsung Foundry 4nm low power enhanced (LN04LPE) CMOS device technology
    • 1.2V±5%, 0.75/0.85V±5% power supply
    Block Diagram -- MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 4nm
  • MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 5nm
    • Samsung Foundry 5nm low power enhanced (LN05LPE) CMOS device technology
    • 1.8V±5%, 1.2V±5%, 0.75/0.85V±5% power supply
    Block Diagram -- MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 5nm
  • MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
    • Compliant with MIPI D-PHY spec up to v2.5 and C-PHY spec up to v2.0
    • Support both MIPI DSI and CSI-2 protocols
    Block Diagram -- MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP in TSMC
  • MIPI C-PHY℠ v2.0 + D-PHY℠ v2.5 Combo IP Core
    • This Tx/Rx transceiver complies with the MIPI Alliance C-PHY℠ v2.0 and D-PHY℠ v2.5 specifications, with world-class area and power dissipation, and is available for a range of foundry processes.
    • This IP delivers 6 Gbps per lane for a max throughput of 24 Gbps in D-PHY℠ mode, and 6 Gsps per trio for a max throughput of 41.04 Gbps in C-PHY℠ mode.
    Block Diagram -- MIPI C-PHY℠ v2.0 + D-PHY℠ v2.5 Combo IP Core
  • MIPI C-PHY/D-PHY Combo IP
    • The MIPI C/D-PHY combo IP is a high-frequency low-power, low cost, physical layer compliant with the MIPI® Alliance Standard for C-PHY and D-PHY.
    • The PHY can be configured as a MIPI Master or MIPI Slave, supporting camera interface CSI-2 v1.2 or display interface DSI v1.3 applications in the D-PHY mode. It also supports camera interface CSI-2 v1.3 and display interface DSI-2 v1.0 applications in the C-PHY mode.
    Block Diagram -- MIPI C-PHY/D-PHY Combo IP
  • MIPI C/D Combo TX PHY and DSI controller
    • High Data Rates: Supports data transmission rates
    • Energy Efficiency: Optimized for low power consumption, making it ideal for battery-powered devices
    • Complete Solution: Combines the MIPI CD-PHY Transmitter PHY and DSI Controller to make it a one-stop solution
    • Flexible IP Configuration


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    Block Diagram -- MIPI C/D Combo TX PHY and DSI controller
  • MIPI DSI-2 High Performance Device Combo Controller for Automotive
    • Compliant with the MIPI DSI and DSI-2 specifications, v2.1
    • Support for dual MIPI DSI use case with VESA Display Stream Compression (DSC) v1.1 standard
    • Support for video and command modes
    • Wide PPI interface to C-PHY v1.2 and D-PHY v2.1
    Block Diagram -- MIPI DSI-2 High Performance Device Combo Controller for Automotive
  • MIPI DSI-2 High Performance Device Combo Controller
    • Compliant with the MIPI DSI and DSI-2 specifications, v2.1
    • Support for dual MIPI DSI use case with VESA Display Stream Compression (DSC) v1.1 standard
    • Support for video and command modes
    • Wide PPI interface to C-PHY v1.2 and D-PHY v2.1
    Block Diagram -- MIPI DSI-2 High Performance Device Combo Controller
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