IP Catalog > 10/100/1000 Gigabit Ethernet PHY

10/100/1000 Gigabit Ethernet PHY IP

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Compare 13 IP from 9 vendors (1 - 10)
  • DO-254 10/100/1000 Ethernet MAC
    • Configurable bit rate (1000 Mb/s, 100 Mb/s or 10 Mb/s)
    • DAL A according to DO-254 / ED-80
    • Compliant to the following clauses of the IEEE 802.3-2008 specification:
    • Compliant to the RMII specification (March 20, 1998)
    Block Diagram -- DO-254 10/100/1000 Ethernet MAC
  • Low-Latency 10/100/1000 Ethernet MAC
    • The LLEMAC-1G implements an Ethernet Media Access Controller (MAC) compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications.
    • Featuring extremely low egress and ingress latency, the core is ideal for the implementation of TSN Ethernet nodes, live streaming and other devices requiring minimum latency in the reception and transition of Ethernet frames.  
    Block Diagram -- Low-Latency 10/100/1000 Ethernet MAC
  • Gigabit Ethernet MAC with AVB
    • Fully compliant with IEEE AVB (Audio Video Bridging) Standard
    • Full-duplex mode at 10/100/1000 Mbps
    • Half-duplex mode at 10/100 Mbps
    • Supports IEEE 802.3-2008 compliant MII, RMII, SMII, GMII, RGMII, and SGMII
    Block Diagram -- Gigabit Ethernet MAC with AVB
  • MAC 10/100/1000 Ethernet Controller
    • IEEE 802.3-2002 specification with preamble, start-of-frame delimiter (SFD), frame padding generation and cyclic redundancy code (CRC) generation and checking is fully implemented
    • Supports 10/100 Mbps or 1000 Mbps operation (selectable via a core configuration registers)
    • Supports full- and half-duplex operation (selectable via a core configuration registers)
    • CSMA/CD protocol for half-duplex operation
    Block Diagram -- MAC 10/100/1000 Ethernet Controller
  • GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in TSMC 28HPC+
    • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
    • IEEE 1588-2008 support
    • BroadR-Reach™ support
    • Dual port MAC interface: GMII (10/100/1000BASE-T), MII (10/100BASE-T).
    Block Diagram -- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in TSMC 28HPC+
  • Silicon Proven 1G Ethernet PHY IP as Whitebox
    • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
    • IEEE 1588-2008 support
    • BroadR-Reach™ support
    • Dual port MAC interface:
    Block Diagram -- Silicon Proven 1G Ethernet PHY IP as Whitebox
  • GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in UMC 28HPC
    • Fully compliant with the IEEE 802.3 / 802.3u/802.3ab10BASE-Te, 100BASE-TX ,1000BASE-T
    • Interface available to Compliant with TP-PMD standard:ANSI X3.263-1995, Compliant with FDDIPMD standard: ISO/IEC 9314-3: 1990 and ANSIX3.166-1990
    • Support GMII / RGMII interface to the MAC controller.?Serial management interface compliant with IEEE802.3u (MDIO)
    • Support Full-Duplex or Half-Duplex Operation,1000BASE Full-Duplex only
    Block Diagram -- GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in UMC 28HPC
  • 10/100/1000 Mbps Ethernet MAC
    • Designed according to IEEE 802.3-2005 Specification.
    • Support 10/100/1000 Mbps Ethernet MAC Speed in Halfduplex and Full-duplex mode.
    • Promiscuous receive mode support.
    • Untagged frames support.
    Block Diagram -- 10/100/1000 Mbps Ethernet MAC
  • 10/100/1000 MBit Ethernet MAC
    • Full implementation of IEEE 802.3-2002
    • 10/100/1000 MBit operation
    • AMBA AHB host interface with DMA
    • Low CPU overhead
    Block Diagram -- 10/100/1000 MBit Ethernet MAC
  • Tri-Mode Ethernet Media Access Controller (TEMAC)
    • Designed to IEEE 802.3-2012 specification
    • Supports 10/100/1000/2500 Mbps Ethernet
    • Configurable half-duplex and full-duplex operation
    • Configured and monitored through an optional independent microprocessor-neutral interface
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