The LLEMAC-1G implements an Ethernet Media Access Controller (MAC) compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. Featuring extremely low egress and ingress latency, the core is ideal for the implementation of TSN Ethernet nodes, live streaming and other devices requiring minimum latency in the reception and transition of Ethernet frames.
The core supports full-duplex and half-duplex operation, supports jumbo frames, provides statistics counters, and it is easy to integrate and implement. The LLEMAC-1G exchanges data with the host system via byte-wide streaming interfaces, and connects to the external PHY via an MII, GMII, or RGMII interface. An independently clocked, 32-bit wide memory-mapped interface provides access to the core's control and status registers. The default core interfaces comply with the Avalon standard, but AMBA™ AXI can also be made available upon request.
The LLEMAC-1G is available in two versions: Normal, and Safety-Enhanced.
The Safety-Enhanced version implements clock activity monitors and uses spatial redundancy for protecting the inner logic of the core. The deliverables for this version include a Safety Manual (SAM), a Failure Modes, Effects and Diagnostics Analysis (FMEDA), and the ISO-26262 “ASIL-D Ready” certificate, issued by SGS-TÜV Saar GmbH.
The core is provided in Verilog RTL or as targeted FPGA netlist, and its deliverables include everything required for a successful implementation, including an extensive testbench, sample scripts, and comprehensive documentation.
